From f6a3fc818bc6a24b6c5bbcc6057f72d2b0b2e2ab Mon Sep 17 00:00:00 2001
From: Øyvind Harboe <oyvind.harboe@zylin.com>
Date: Fri, 3 Sep 2010 22:49:37 +0200
Subject: warnings: fix alignment warnings
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These warnings are for architectures that do not
support non-aligned word access.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
---
src/flash/mflash.c | 4 ++--
src/flash/nand/lpc3180.c | 4 ++--
src/flash/nor/at91sam3.c | 4 ++--
3 files changed, 6 insertions(+), 6 deletions(-)
(limited to 'src/flash')
diff --git a/src/flash/mflash.c b/src/flash/mflash.c
index 43721280..26b85b1f 100644
--- a/src/flash/mflash.c
+++ b/src/flash/mflash.c
@@ -1121,7 +1121,7 @@ static int mg_storage_config(void)
!= ERROR_OK)
return ret;
- mg_gen_ataid((mg_io_type_drv_info *)buff);
+ mg_gen_ataid((mg_io_type_drv_info *)(void *)buff);
if ((ret = mg_mflash_do_write_sects(buff, 0, 1, mg_vcmd_update_stgdrvinfo))
!= ERROR_OK)
@@ -1149,7 +1149,7 @@ static int mg_boot_config(void)
buff[0] = mg_op_mode_snd; /* operation mode */
buff[1] = MG_UNLOCK_OTP_AREA;
buff[2] = 4; /* boot size */
- *((uint32_t *)(buff + 4)) = 0; /* XIP size */
+ *((uint32_t *)(void *)(buff + 4)) = 0; /* XIP size */
if ((ret = mg_mflash_do_write_sects(buff, 0, 1, mg_vcmd_update_xipinfo))
!= ERROR_OK)
diff --git a/src/flash/nand/lpc3180.c b/src/flash/nand/lpc3180.c
index 93d00d5c..d81443d1 100644
--- a/src/flash/nand/lpc3180.c
+++ b/src/flash/nand/lpc3180.c
@@ -1119,9 +1119,9 @@ static int lpc3180_read_page(struct nand_device *nand, uint32_t page, uint8_t *d
target_read_memory(target, target_mem_base+SPARE_OFFS, 4, 16, ecc_flash_buffer);
target_read_memory(target, target_mem_base+ECC_OFFS, 4, 8, ecc_hw_buffer);
for(i=0;i<idx;i++){
- if( (0x00ffffff&*(uint32_t *)(ecc_hw_buffer+i*8)) != (0x00ffffff&*(uint32_t *)(ecc_flash_buffer+8+i*16)) )
+ if( (0x00ffffff&*(uint32_t *)(void *)(ecc_hw_buffer+i*8)) != (0x00ffffff&*(uint32_t *)(void *)(ecc_flash_buffer+8+i*16)) )
LOG_WARNING("ECC mismatch at 256 bytes size block= %d at page= 0x%" PRIx32,i*2+1,page);
- if( (0x00ffffff&*(uint32_t *)(ecc_hw_buffer+4+i*8)) != (0x00ffffff&*(uint32_t *)(ecc_flash_buffer+12+i*16)) )
+ if( (0x00ffffff&*(uint32_t *)(void *)(ecc_hw_buffer+4+i*8)) != (0x00ffffff&*(uint32_t *)(void *)(ecc_flash_buffer+12+i*16)) )
LOG_WARNING("ECC mismatch at 256 bytes size block= %d at page= 0x%" PRIx32,i*2+2,page);
}
}
diff --git a/src/flash/nor/at91sam3.c b/src/flash/nor/at91sam3.c
index 221832ce..8005fe0a 100644
--- a/src/flash/nor/at91sam3.c
+++ b/src/flash/nor/at91sam3.c
@@ -1702,7 +1702,7 @@ sam3_get_reg_ptr(struct sam3_cfg *pCfg, const struct sam3_reg_list *pList)
// By using prototypes - we can detect what would
// be casting errors.
- return ((uint32_t *)(((char *)(pCfg)) + pList->struct_offset));
+ return ((uint32_t *)(void *)(((char *)(pCfg)) + pList->struct_offset));
}
@@ -1756,7 +1756,7 @@ sam3_GetReg(struct sam3_chip *pChip, uint32_t *goes_here)
// calculate where this one go..
// it is "possibly" this register.
- pPossible = ((uint32_t *)(((char *)(&(pChip->cfg))) + pReg->struct_offset));
+ pPossible = ((uint32_t *)(void *)(((char *)(&(pChip->cfg))) + pReg->struct_offset));
// well? Is it this register
if (pPossible == goes_here) {
--
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