From e9297b40b994f071474210e7d9e224d50e25fcaf Mon Sep 17 00:00:00 2001 From: drath Date: Wed, 22 Nov 2006 13:03:10 +0000 Subject: - added a PLD (programmable logic device) subsystem for FPGA, CPLD etc. configuration - added support for loading .bit files into Xilinx Virtex-II devices - added support for the Gateworks GW16012 JTAG dongle - merged CFI fixes from XScale branch - a few minor fixes git-svn-id: svn://svn.berlios.de/openocd/trunk@116 b42882b7-edfa-0310-969c-e2dbd0fdcd60 --- src/helper/binarybuffer.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/helper/binarybuffer.c') diff --git a/src/helper/binarybuffer.c b/src/helper/binarybuffer.c index 6afd6e59..7d41dc73 100644 --- a/src/helper/binarybuffer.c +++ b/src/helper/binarybuffer.c @@ -143,8 +143,8 @@ int buf_cmp_mask(u8 *buf1, u8 *buf2, u8 *mask, int size) /* mask out bits that don't really belong to the buffer if size isn't a multiple of 8 bits */ if ((size % 8) && (i == num_bytes -1 )) { - if (((buf1[i] & ((1 << (size % 8)) - 1)) & ((1 << (size % 8)) - 1)) != - ((buf2[i] & ((1 << (size % 8)) - 1)) & ((1 << (size % 8)) - 1))) + if ((buf1[i] & ((1 << (size % 8)) - 1) & mask[i]) != + (buf2[i] & ((1 << (size % 8)) - 1) & mask[i])) return 1; } else -- cgit v1.2.3