From e9297b40b994f071474210e7d9e224d50e25fcaf Mon Sep 17 00:00:00 2001 From: drath Date: Wed, 22 Nov 2006 13:03:10 +0000 Subject: - added a PLD (programmable logic device) subsystem for FPGA, CPLD etc. configuration - added support for loading .bit files into Xilinx Virtex-II devices - added support for the Gateworks GW16012 JTAG dongle - merged CFI fixes from XScale branch - a few minor fixes git-svn-id: svn://svn.berlios.de/openocd/trunk@116 b42882b7-edfa-0310-969c-e2dbd0fdcd60 --- src/pld/virtex2.h | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) create mode 100644 src/pld/virtex2.h (limited to 'src/pld/virtex2.h') diff --git a/src/pld/virtex2.h b/src/pld/virtex2.h new file mode 100644 index 00000000..1b5865dd --- /dev/null +++ b/src/pld/virtex2.h @@ -0,0 +1,31 @@ +/*************************************************************************** + * Copyright (C) 2006 by Dominic Rath * + * Dominic.Rath@gmx.de * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 2 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, write to the * + * Free Software Foundation, Inc., * + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * + ***************************************************************************/ +#ifndef VIRTEX2_H +#define VIRTEX2_H + +#include "pld.h" +#include "xilinx_bit.h" + +typedef struct virtex2_pld_device_s +{ + int chain_pos; +} virtex2_pld_device_t; + +#endif /* VIRTEX2_H */ -- cgit v1.2.3