From cb582796539d35920e918bec2d0118eb3736d40e Mon Sep 17 00:00:00 2001 From: drath Date: Thu, 15 Mar 2007 13:36:44 +0000 Subject: - reworked file i/o. every fileaccess (target, flash, nand, in future configuration, too) should now go through the fileio subsystem - added support for reading IHEX files (through fileio) - load/dump_binary renamed to the more generic load/dump_image
['bin'|'ihex'] - added NAND framework (preliminary) - added support for the LPC3180 SLC and MLC NAND controllers (preliminary) - fix initialization for parport - gw16012 fixes/cleanups - added EmbeddedICE version 7 (preliminary, reported on two LPC23xx devices so far) - added 'arm7_9 etm ' configuration command to enable access to the ETM registers git-svn-id: svn://svn.berlios.de/openocd/trunk@132 b42882b7-edfa-0310-969c-e2dbd0fdcd60 --- src/target/arm7tdmi.c | 3 --- 1 file changed, 3 deletions(-) (limited to 'src/target/arm7tdmi.c') diff --git a/src/target/arm7tdmi.c b/src/target/arm7tdmi.c index 5d925e21..a87b8a4a 100644 --- a/src/target/arm7tdmi.c +++ b/src/target/arm7tdmi.c @@ -736,8 +736,6 @@ void arm7tdmi_build_reg_cache(target_t *target) armv4_5_common_t *armv4_5 = target->arch_info; arm7_9_common_t *arm7_9 = armv4_5->arch_info; arm_jtag_t *jtag_info = &arm7_9->jtag_info; - arm7tdmi_common_t *arch_info = arm7_9->arch_info; - (*cache_p) = armv4_5_build_reg_cache(target, armv4_5); armv4_5->core_cache = (*cache_p); @@ -771,7 +769,6 @@ int arm7tdmi_init_arch_info(target_t *target, arm7tdmi_common_t *arm7tdmi, int c { armv4_5_common_t *armv4_5; arm7_9_common_t *arm7_9; - int has_etm = 0; arm7_9 = &arm7tdmi->arm7_9_common; armv4_5 = &arm7_9->armv4_5_common; -- cgit v1.2.3