From 1aac72d24339380f6e98c50dec4c96ab30537749 Mon Sep 17 00:00:00 2001 From: David Brownell Date: Sun, 21 Feb 2010 14:34:33 -0800 Subject: ARM: keep a handle to the PC Keep a handle to the PC in "struct arm", and use it. This register is used a fair amount, so this is a net minor code shrink (other than some line length fixes), but mostly it's to make things more readable. For XScale, fix a dodgy sequence while stepping. It was initializing a variable to a non-NULL value, then updating it to handle the step-over-active-breakpoint case, and then later testing for non-NULL to see if it should reverse that step-over-active logic. It should have done like ARM7/ARM9 does: init to NULL. Signed-off-by: David Brownell --- src/target/arm926ejs.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'src/target/arm926ejs.c') diff --git a/src/target/arm926ejs.c b/src/target/arm926ejs.c index 32ecf72d..d8111966 100644 --- a/src/target/arm926ejs.c +++ b/src/target/arm926ejs.c @@ -569,9 +569,9 @@ int arm926ejs_soft_reset_halt(struct target *target) armv4_5->cpsr->dirty = 1; /* start fetching from 0x0 */ - buf_set_u32(armv4_5->core_cache->reg_list[15].value, 0, 32, 0x0); - armv4_5->core_cache->reg_list[15].dirty = 1; - armv4_5->core_cache->reg_list[15].valid = 1; + buf_set_u32(armv4_5->pc->value, 0, 32, 0x0); + armv4_5->pc->dirty = 1; + armv4_5->pc->valid = 1; arm926ejs_disable_mmu_caches(target, 1, 1, 1); arm926ejs->armv4_5_mmu.mmu_enabled = 0; -- cgit v1.2.3