From ee8e93cb836bc01581329c5685c888c4d85e6c1b Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Tue, 27 Oct 2009 01:14:32 -0400 Subject: ARM: call thumb_pass_branch_condition() only for actual branch opcodes Calling it first with every opcodes and then testing if the opcode was indeed a branch instruction is wasteful and rather strange. If ever thumb_pass_branch_condition() has side effects (say, like printing a debugging traces) then the result would be garbage for most Thumb instructions which have no condition code. While at it, let's make the nearby code more readable by reducing some of the redundant brace noise and reworking the error handling construct. Signed-off-by: Nicolas Pitre Signed-off-by: David Brownell --- src/target/arm_simulator.c | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) (limited to 'src/target/arm_simulator.c') diff --git a/src/target/arm_simulator.c b/src/target/arm_simulator.c index e2f49c39..646baea7 100644 --- a/src/target/arm_simulator.c +++ b/src/target/arm_simulator.c @@ -309,19 +309,17 @@ int arm_simulate_step_core(target_t *target, uint32_t *dry_run_pc, struct arm_si { uint16_t opcode; - if ((retval = target_read_u16(target, current_pc, &opcode)) != ERROR_OK) - { + retval = target_read_u16(target, current_pc, &opcode); + if (retval != ERROR_OK) return retval; - } - if ((retval = thumb_evaluate_opcode(opcode, current_pc, &instruction)) != ERROR_OK) - { + retval = thumb_evaluate_opcode(opcode, current_pc, &instruction); + if (retval != ERROR_OK) return retval; - } instruction_size = 2; /* check condition code (only for branch instructions) */ - if ((!thumb_pass_branch_condition(sim->get_cpsr(sim, 0, 32), opcode)) && - (instruction.type == ARM_B)) + if (instruction.type == ARM_B && + !thumb_pass_branch_condition(sim->get_cpsr(sim, 0, 32), opcode)) { if (dry_run_pc) { -- cgit v1.2.3