From 3acb107b9ae4e3d38d3fcfd29b455ebcfb444696 Mon Sep 17 00:00:00 2001 From: drath Date: Thu, 31 Aug 2006 12:41:49 +0000 Subject: - endianess fixes everywhere but in the flash code. flashing might still be broken on big-endian targets and/or hosts - added access to ARM920T vector catch register (via generic register mechanism) - don't disable linefills on ARM920T cores - this lead to lockups when accessing lines already contained in cache - read content of ARM920T cache and tlb into file (arm920t read_flash/read_mmu commands) - memory reading improved on ARM7/9, can be further accelerated with new "arm7_9 fast_memory_access enable" command (renamed from fast_writes) - made in_handler independent from in field (makes the handler more flexible) - added timeout to ft2232 when using D2XX library - fixed STR7x protection bit handling on second bank (thanks to Bernard) - added support for using the OpenOCD on AT91RM9200 systems (thanks to Anders Larsen) - fixed AT91SAM7 flash handling when not running from 32kHz clock (thanks to Anders Larsen) git-svn-id: svn://svn.berlios.de/openocd/trunk@90 b42882b7-edfa-0310-969c-e2dbd0fdcd60 --- src/target/armv4_5.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/target/armv4_5.c') diff --git a/src/target/armv4_5.c b/src/target/armv4_5.c index 9ee0577d..86d5dc89 100644 --- a/src/target/armv4_5.c +++ b/src/target/armv4_5.c @@ -392,7 +392,7 @@ int handle_armv4_5_disassemble_command(struct command_context_s *cmd_ctx, char * int i; arm_instruction_t cur_instruction; u32 opcode; - int thumb; + int thumb = 0; if (armv4_5->common_magic != ARMV4_5_COMMON_MAGIC) { @@ -415,7 +415,7 @@ int handle_armv4_5_disassemble_command(struct command_context_s *cmd_ctx, char * for (i = 0; i < count; i++) { - target->type->read_memory(target, address, 4, 1, (u8*)&opcode); + target_read_u32(target, address, &opcode); evaluate_opcode(opcode, address, &cur_instruction); command_print(cmd_ctx, "%s", cur_instruction.text); address += (thumb) ? 2 : 4; -- cgit v1.2.3