From a4a2808c2a849eddd5d7d454c048ffdfd89ca9c6 Mon Sep 17 00:00:00 2001 From: David Brownell Date: Mon, 7 Dec 2009 14:54:12 -0800 Subject: ARM: move opcode macros to Move the ARM opcode macros from , and a few Thumb2 ones from , to more appropriate homes in a new file. Removed duplicate opcodes from that v7m/Thumb2 set. Protected a few macro argument references by adding missing parentheses. Tightening up some of the line lengths turned up a curious artifact: the macros for the Thumb opcodes are all 32 bits wide, not 16 bits. There's currently no explanation for why it's done that way... Signed-off-by: David Brownell --- src/target/cortex_m3.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'src/target/cortex_m3.c') diff --git a/src/target/cortex_m3.c b/src/target/cortex_m3.c index 195a3b9a..558b2117 100644 --- a/src/target/cortex_m3.c +++ b/src/target/cortex_m3.c @@ -37,6 +37,7 @@ #include "target_type.h" #include "arm_disassembler.h" #include "register.h" +#include "arm_opcodes.h" /* NOTE: most of this should work fine for the Cortex-M1 and @@ -880,7 +881,7 @@ cortex_m3_set_breakpoint(struct target *target, struct breakpoint *breakpoint) else if (breakpoint->type == BKPT_SOFT) { uint8_t code[4]; - buf_set_u32(code, 0, 32, ARMV7M_T_BKPT(0x11)); + buf_set_u32(code, 0, 32, ARMV5_T_BKPT(0x11)); if ((retval = target_read_memory(target, breakpoint->address & 0xFFFFFFFE, breakpoint->length, 1, breakpoint->orig_instr)) != ERROR_OK) { return retval; -- cgit v1.2.3