From 53d1f9b2ca5718e4996e9cf3406f857d0ed26df2 Mon Sep 17 00:00:00 2001 From: drath Date: Thu, 14 Jun 2007 09:47:00 +0000 Subject: - added manpage for OpenOCD (thanks to Uwe Hermann) - fixed bug in ARM926EJ-S cache handling that caused cache linefills to be disabled after first debug entry - added support for auto image type detection (thanks to Vincent Palatin) - further work on ETM trace decoding (tested with a ETB interface using an ETM in normal 16-bit port mode, still experimental) git-svn-id: svn://svn.berlios.de/openocd/trunk@169 b42882b7-edfa-0310-969c-e2dbd0fdcd60 --- src/target/etm.h | 18 ++++++++++++++---- 1 file changed, 14 insertions(+), 4 deletions(-) (limited to 'src/target/etm.h') diff --git a/src/target/etm.h b/src/target/etm.h index 65fd757c..0b7b05ad 100644 --- a/src/target/etm.h +++ b/src/target/etm.h @@ -120,11 +120,17 @@ typedef struct etm_capture_driver_s int (*stop_capture)(struct etm_context_s *etm_ctx); } etm_capture_driver_t; +enum +{ + ETMV1_TRACESYNC_CYCLE = 0x1, + ETMV1_TRIGGER_CYCLE = 0x2, +}; + typedef struct etmv1_trace_data_s { - u8 pipestat; /* pipeline cycle this packet belongs to */ - u16 packet; /* packet data (4, 8 or 16 bit) */ - int tracesync; /* 1 if tracesync was set on this packet */ + u8 pipestat; /* bits 0-2 pipeline status */ + u16 packet; /* packet data (4, 8 or 16 bit) */ + int flags; /* ETMV1_TRACESYNC_CYCLE, ETMV1_TRIGGER_CYCLE */ } etmv1_trace_data_t; /* describe a trace context @@ -134,6 +140,7 @@ typedef struct etmv1_trace_data_s */ typedef struct etm_context_s { + target_t *target; /* target this ETM is connected to */ reg_cache_t *reg_cache; /* ETM register cache */ etm_capture_driver_t *capture_driver; /* driver used to access ETM data */ void *capture_driver_priv; /* capture driver private data */ @@ -143,13 +150,16 @@ typedef struct etm_context_s etm_portmode_t portmode; /* normal, multiplexed or demultiplexed */ etmv1_tracemode_t tracemode; /* type of information the trace contains (data, addres, contextID, ...) */ armv4_5_state_t core_state; /* current core state (ARM, Thumb, Jazelle) */ - image_t image; /* source for target opcodes */ + image_t *image; /* source for target opcodes */ u32 pipe_index; /* current trace cycle */ u32 data_index; /* cycle holding next data packet */ + int data_half; /* port half on a 16 bit port */ u32 current_pc; /* current program counter */ u32 pc_ok; /* full PC has been acquired */ u32 last_branch; /* last branch address output */ + u32 last_branch_reason; /* branch reason code for the last branch encountered */ u32 last_ptr; /* address of the last data access */ + u32 ptr_ok; /* whether last_ptr is valid */ u32 context_id; /* context ID of the code being traced */ } etm_context_t; -- cgit v1.2.3