From 837555ab24ab32af163b5dd295dcdbc3c238ad6f Mon Sep 17 00:00:00 2001 From: oharboe Date: Tue, 21 Apr 2009 11:35:58 +0000 Subject: Nico Coesel MIPS32 speedup patches git-svn-id: svn://svn.berlios.de/openocd/trunk@1494 b42882b7-edfa-0310-969c-e2dbd0fdcd60 --- src/target/mips32.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/target/mips32.h') diff --git a/src/target/mips32.h b/src/target/mips32.h index 72035b4c..7a4dd5e6 100644 --- a/src/target/mips32.h +++ b/src/target/mips32.h @@ -74,6 +74,7 @@ typedef struct mips32_core_reg_s } mips32_core_reg_t; #define MIPS32_OP_BEQ 0x04 +#define MIPS32_OP_BNE 0x05 #define MIPS32_OP_ADDI 0x08 #define MIPS32_OP_AND 0x24 #define MIPS32_OP_COP0 0x10 @@ -102,6 +103,7 @@ typedef struct mips32_core_reg_s #define MIPS32_AND(reg, off, val) MIPS32_R_INST(0, off, val, reg, 0, MIPS32_OP_AND) #define MIPS32_B(off) MIPS32_BEQ(0, 0, off) #define MIPS32_BEQ(src,tar,off) MIPS32_I_INST(MIPS32_OP_BEQ, src, tar, off) +#define MIPS32_BNE(src,tar,off) MIPS32_I_INST(MIPS32_OP_BNE, src, tar, off) #define MIPS32_MFC0(gpr, cpr, sel) MIPS32_R_INST(MIPS32_OP_COP0, MIPS32_COP0_MF, gpr, cpr, 0, sel) #define MIPS32_MTC0(gpr,cpr, sel) MIPS32_R_INST(MIPS32_OP_COP0, MIPS32_COP0_MT, gpr, cpr, 0, sel) #define MIPS32_LBU(reg, off, base) MIPS32_I_INST(MIPS32_OP_LBU, base, reg, off) -- cgit v1.2.3