From b25574e16aadb92f00882ef743179ab8b6c91502 Mon Sep 17 00:00:00 2001
From: oharboe <oharboe@b42882b7-edfa-0310-969c-e2dbd0fdcd60>
Date: Mon, 5 Jan 2009 09:25:23 +0000
Subject: Andi <opencode@gmx.net> basic support for the MIPS based SMP8634 SoC.

git-svn-id: svn://svn.berlios.de/openocd/trunk@1299 b42882b7-edfa-0310-969c-e2dbd0fdcd60
---
 src/target/target/smp8634.cfg | 32 ++++++++++++++++++++++++++++++++
 1 file changed, 32 insertions(+)
 create mode 100644 src/target/target/smp8634.cfg

(limited to 'src/target/target/smp8634.cfg')

diff --git a/src/target/target/smp8634.cfg b/src/target/target/smp8634.cfg
new file mode 100644
index 00000000..2470a5da
--- /dev/null
+++ b/src/target/target/smp8634.cfg
@@ -0,0 +1,32 @@
+# script for Sigma Designs SMP8634 (eventually even SMP8635)
+
+if { [info exists CHIPNAME] } {
+   set  _CHIPNAME $CHIPNAME
+} else {
+   set  _CHIPNAME smp8634
+}
+
+if { [info exists ENDIAN] } {
+   set  _ENDIAN $ENDIAN
+} else {
+   set  _ENDIAN little
+}
+
+if { [info exists CPUTAPID ] } {
+   set _CPUTAPID $CPUTAPID
+} else {
+   # force an error till we get a good number
+   set _CPUTAPID 0x08630001
+}
+
+jtag_nsrst_delay 100
+jtag_ntrst_delay 100
+
+reset_config trst_and_srst separate
+
+# jtag scan chain
+# format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
+jtag newtap $_CHIPNAME cpu -irlen 5  -ircapture 0x1 -irmask 0x1
+
+set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+target create $_TARGETNAME mips_m4k -endian $_ENDIAN -variant
-- 
cgit v1.2.3