From f876d5e9c769a288faa7fd14b7bf373363542aab Mon Sep 17 00:00:00 2001 From: zwelch Date: Thu, 18 Jun 2009 07:07:59 +0000 Subject: Transform 'u16' to 'uint16_t' - Replace '\([^_]\)u16' with '\1uint16_t'. - Replace '^u16' with 'uint16_t'. git-svn-id: svn://svn.berlios.de/openocd/trunk@2277 b42882b7-edfa-0310-969c-e2dbd0fdcd60 --- src/target/arm11.c | 10 +++++----- src/target/arm7_9_common.c | 4 ++-- src/target/arm7_9_common.h | 2 +- src/target/arm7tdmi.c | 2 +- src/target/arm9tdmi.c | 2 +- src/target/arm_adi_v5.c | 10 +++++----- src/target/arm_disassembler.c | 30 +++++++++++++++--------------- src/target/arm_disassembler.h | 2 +- src/target/arm_jtag.c | 8 ++++---- src/target/arm_simulator.c | 4 ++-- src/target/armv4_5.c | 2 +- src/target/armv7m.c | 12 ++++++------ src/target/avrt.c | 8 ++++---- src/target/cortex_a8.c | 2 +- src/target/cortex_m3.c | 2 +- src/target/etm.h | 2 +- src/target/feroceon.c | 2 +- src/target/image.c | 4 ++-- src/target/mips32_dmaacc.c | 10 +++++----- src/target/mips32_dmaacc.h | 4 ++-- src/target/mips32_pracc.c | 8 ++++---- src/target/mips32_pracc.h | 4 ++-- src/target/mips_m4k.c | 8 ++++---- src/target/target.c | 12 ++++++------ src/target/target.h | 8 ++++---- src/target/xscale.h | 2 +- 26 files changed, 82 insertions(+), 82 deletions(-) (limited to 'src/target') diff --git a/src/target/arm11.c b/src/target/arm11.c index 7e8c4c67..380f2cea 100644 --- a/src/target/arm11.c +++ b/src/target/arm11.c @@ -1092,7 +1092,7 @@ int arm11_get_gdb_reg_list(struct target_s *target, struct reg_s **reg_list[], i */ int arm11_read_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer) { - /** \todo TODO: check if buffer cast to u32* and u16* might cause alignment problems */ + /** \todo TODO: check if buffer cast to u32* and uint16_t* might cause alignment problems */ FNC_INFO; @@ -1148,8 +1148,8 @@ int arm11_read_memory(struct target_s *target, u32 address, u32 size, u32 count, /* MCR p14,0,R1,c0,c5,0 */ arm11_run_instr_data_from_core(arm11, 0xEE001E15, &res, 1); - u16 svalue = res; - memcpy(buffer + count * sizeof(u16), &svalue, sizeof(u16)); + uint16_t svalue = res; + memcpy(buffer + count * sizeof(uint16_t), &svalue, sizeof(uint16_t)); } break; @@ -1218,8 +1218,8 @@ int arm11_write_memory(struct target_s *target, u32 address, u32 size, u32 count for (size_t i = 0; i < count; i++) { - u16 value; - memcpy(&value, buffer + count * sizeof(u16), sizeof(u16)); + uint16_t value; + memcpy(&value, buffer + count * sizeof(uint16_t), sizeof(uint16_t)); /* MRC p14,0,r1,c0,c5,0 */ arm11_run_instr_data_to_core1(arm11, 0xee101e15, value); diff --git a/src/target/arm7_9_common.c b/src/target/arm7_9_common.c index a2e42e75..e5f139e4 100644 --- a/src/target/arm7_9_common.c +++ b/src/target/arm7_9_common.c @@ -296,7 +296,7 @@ int arm7_9_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint) } else { - u16 verify = 0xffff; + uint16_t verify = 0xffff; /* keep the original instruction in target endianness */ if ((retval = target_read_memory(target, breakpoint->address, 2, 1, breakpoint->orig_instr)) != ERROR_OK) { @@ -385,7 +385,7 @@ int arm7_9_unset_breakpoint(struct target_s *target, breakpoint_t *breakpoint) } else { - u16 current_instr; + uint16_t current_instr; /* check that user program as not modified breakpoint instruction */ if ((retval = target_read_memory(target, breakpoint->address, 2, 1, (uint8_t*)¤t_instr)) != ERROR_OK) { diff --git a/src/target/arm7_9_common.h b/src/target/arm7_9_common.h index bab2baec..d18089b4 100644 --- a/src/target/arm7_9_common.h +++ b/src/target/arm7_9_common.h @@ -45,7 +45,7 @@ typedef struct arm7_9_common_s reg_cache_t *eice_cache; /**< Embedded ICE register cache */ u32 arm_bkpt; /**< ARM breakpoint instruction */ - u16 thumb_bkpt; /**< Thumb breakpoint instruction */ + uint16_t thumb_bkpt; /**< Thumb breakpoint instruction */ int sw_breakpoints_added; /**< Specifies which watchpoint software breakpoints are setup on */ int breakpoint_count; /**< Current number of set breakpoints */ int wp_available; /**< Current number of available watchpoint units */ diff --git a/src/target/arm7tdmi.c b/src/target/arm7tdmi.c index 14646c3c..44e831fd 100644 --- a/src/target/arm7tdmi.c +++ b/src/target/arm7tdmi.c @@ -396,7 +396,7 @@ void arm7tdmi_read_core_regs_target_buffer(target_t *target, u32 mask, void* buf arm_jtag_t *jtag_info = &arm7_9->jtag_info; int be = (target->endianness == TARGET_BIG_ENDIAN) ? 1 : 0; u32 *buf_u32 = buffer; - u16 *buf_u16 = buffer; + uint16_t *buf_u16 = buffer; uint8_t *buf_u8 = buffer; /* STMIA r0-15, [r0] at debug speed diff --git a/src/target/arm9tdmi.c b/src/target/arm9tdmi.c index bc87f136..dc11d7c0 100644 --- a/src/target/arm9tdmi.c +++ b/src/target/arm9tdmi.c @@ -447,7 +447,7 @@ void arm9tdmi_read_core_regs_target_buffer(target_t *target, u32 mask, void* buf arm_jtag_t *jtag_info = &arm7_9->jtag_info; int be = (target->endianness == TARGET_BIG_ENDIAN) ? 1 : 0; u32 *buf_u32 = buffer; - u16 *buf_u16 = buffer; + uint16_t *buf_u16 = buffer; uint8_t *buf_u8 = buffer; /* STMIA r0-15, [r0] at debug speed diff --git a/src/target/arm_adi_v5.c b/src/target/arm_adi_v5.c index 3563c19c..b756af91 100644 --- a/src/target/arm_adi_v5.c +++ b/src/target/arm_adi_v5.c @@ -599,8 +599,8 @@ int mem_ap_write_buf_u16(swjdp_common_t *swjdp, uint8_t *buffer, int count, u32 while (count > 0) { dap_setup_accessport(swjdp, CSW_16BIT | CSW_ADDRINC_SINGLE, address); - u16 svalue; - memcpy(&svalue, buffer, sizeof(u16)); + uint16_t svalue; + memcpy(&svalue, buffer, sizeof(uint16_t)); u32 outvalue = (u32)svalue << 8 * (address & 0x3); dap_ap_write_reg_u32(swjdp, AP_REG_DRW, outvalue ); retval = swjdp_transaction_endcheck(swjdp); @@ -860,8 +860,8 @@ int mem_ap_read_buf_u16(swjdp_common_t *swjdp, uint8_t *buffer, int count, u32 a } else { - u16 svalue = (invalue >> 8 * (address & 0x3)); - memcpy(buffer, &svalue, sizeof(u16)); + uint16_t svalue = (invalue >> 8 * (address & 0x3)); + memcpy(buffer, &svalue, sizeof(uint16_t)); address += 2; buffer += 2; } @@ -1057,7 +1057,7 @@ int dap_info_command(struct command_context_s *cmd_ctx, swjdp_common_t *swjdp, i if (romtable_present) { u32 cid0,cid1,cid2,cid3,memtype,romentry; - u16 entry_offset; + uint16_t entry_offset; /* bit 16 of apid indicates a memory access port */ if (dbgbase&0x02) { diff --git a/src/target/arm_disassembler.c b/src/target/arm_disassembler.c index 321f56cb..f2876334 100644 --- a/src/target/arm_disassembler.c +++ b/src/target/arm_disassembler.c @@ -1319,7 +1319,7 @@ int arm_evaluate_opcode(u32 opcode, u32 address, arm_instruction_t *instruction) return -1; } -int evaluate_b_bl_blx_thumb(u16 opcode, u32 address, arm_instruction_t *instruction) +int evaluate_b_bl_blx_thumb(uint16_t opcode, u32 address, arm_instruction_t *instruction) { u32 offset = opcode & 0x7ff; u32 opc = (opcode >> 11) & 0x3; @@ -1366,7 +1366,7 @@ int evaluate_b_bl_blx_thumb(u16 opcode, u32 address, arm_instruction_t *instruct return ERROR_OK; } -int evaluate_add_sub_thumb(u16 opcode, u32 address, arm_instruction_t *instruction) +int evaluate_add_sub_thumb(uint16_t opcode, u32 address, arm_instruction_t *instruction) { uint8_t Rd = (opcode >> 0) & 0x7; uint8_t Rn = (opcode >> 3) & 0x7; @@ -1408,7 +1408,7 @@ int evaluate_add_sub_thumb(u16 opcode, u32 address, arm_instruction_t *instructi return ERROR_OK; } -int evaluate_shift_imm_thumb(u16 opcode, u32 address, arm_instruction_t *instruction) +int evaluate_shift_imm_thumb(uint16_t opcode, u32 address, arm_instruction_t *instruction) { uint8_t Rd = (opcode >> 0) & 0x7; uint8_t Rm = (opcode >> 3) & 0x7; @@ -1452,7 +1452,7 @@ int evaluate_shift_imm_thumb(u16 opcode, u32 address, arm_instruction_t *instruc return ERROR_OK; } -int evaluate_data_proc_imm_thumb(u16 opcode, u32 address, arm_instruction_t *instruction) +int evaluate_data_proc_imm_thumb(uint16_t opcode, u32 address, arm_instruction_t *instruction) { uint8_t imm = opcode & 0xff; uint8_t Rd = (opcode >> 8) & 0x7; @@ -1493,7 +1493,7 @@ int evaluate_data_proc_imm_thumb(u16 opcode, u32 address, arm_instruction_t *ins return ERROR_OK; } -int evaluate_data_proc_thumb(u16 opcode, u32 address, arm_instruction_t *instruction) +int evaluate_data_proc_thumb(uint16_t opcode, u32 address, arm_instruction_t *instruction) { uint8_t high_reg, op, Rm, Rd,H1,H2; char *mnemonic = NULL; @@ -1652,7 +1652,7 @@ int evaluate_data_proc_thumb(u16 opcode, u32 address, arm_instruction_t *instruc return ERROR_OK; } -int evaluate_load_literal_thumb(u16 opcode, u32 address, arm_instruction_t *instruction) +int evaluate_load_literal_thumb(uint16_t opcode, u32 address, arm_instruction_t *instruction) { u32 immediate; uint8_t Rd = (opcode >> 8) & 0x7; @@ -1671,7 +1671,7 @@ int evaluate_load_literal_thumb(u16 opcode, u32 address, arm_instruction_t *inst return ERROR_OK; } -int evaluate_load_store_reg_thumb(u16 opcode, u32 address, arm_instruction_t *instruction) +int evaluate_load_store_reg_thumb(uint16_t opcode, u32 address, arm_instruction_t *instruction) { uint8_t Rd = (opcode >> 0) & 0x7; uint8_t Rn = (opcode >> 3) & 0x7; @@ -1726,7 +1726,7 @@ int evaluate_load_store_reg_thumb(u16 opcode, u32 address, arm_instruction_t *in return ERROR_OK; } -int evaluate_load_store_imm_thumb(u16 opcode, u32 address, arm_instruction_t *instruction) +int evaluate_load_store_imm_thumb(uint16_t opcode, u32 address, arm_instruction_t *instruction) { u32 offset = (opcode >> 6) & 0x1f; uint8_t Rd = (opcode >> 0) & 0x7; @@ -1770,7 +1770,7 @@ int evaluate_load_store_imm_thumb(u16 opcode, u32 address, arm_instruction_t *in return ERROR_OK; } -int evaluate_load_store_stack_thumb(u16 opcode, u32 address, arm_instruction_t *instruction) +int evaluate_load_store_stack_thumb(uint16_t opcode, u32 address, arm_instruction_t *instruction) { u32 offset = opcode & 0xff; uint8_t Rd = (opcode >> 8) & 0x7; @@ -1799,7 +1799,7 @@ int evaluate_load_store_stack_thumb(u16 opcode, u32 address, arm_instruction_t * return ERROR_OK; } -int evaluate_add_sp_pc_thumb(u16 opcode, u32 address, arm_instruction_t *instruction) +int evaluate_add_sp_pc_thumb(uint16_t opcode, u32 address, arm_instruction_t *instruction) { u32 imm = opcode & 0xff; uint8_t Rd = (opcode >> 8) & 0x7; @@ -1830,7 +1830,7 @@ int evaluate_add_sp_pc_thumb(u16 opcode, u32 address, arm_instruction_t *instruc return ERROR_OK; } -int evaluate_adjust_stack_thumb(u16 opcode, u32 address, arm_instruction_t *instruction) +int evaluate_adjust_stack_thumb(uint16_t opcode, u32 address, arm_instruction_t *instruction) { u32 imm = opcode & 0x7f; uint8_t opc = opcode & (1<<7); @@ -1858,7 +1858,7 @@ int evaluate_adjust_stack_thumb(u16 opcode, u32 address, arm_instruction_t *inst return ERROR_OK; } -int evaluate_breakpoint_thumb(u16 opcode, u32 address, arm_instruction_t *instruction) +int evaluate_breakpoint_thumb(uint16_t opcode, u32 address, arm_instruction_t *instruction) { u32 imm = opcode & 0xff; @@ -1869,7 +1869,7 @@ int evaluate_breakpoint_thumb(u16 opcode, u32 address, arm_instruction_t *instru return ERROR_OK; } -int evaluate_load_store_multiple_thumb(u16 opcode, u32 address, arm_instruction_t *instruction) +int evaluate_load_store_multiple_thumb(uint16_t opcode, u32 address, arm_instruction_t *instruction) { u32 reg_list = opcode & 0xff; u32 L = opcode & (1<<11); @@ -1936,7 +1936,7 @@ int evaluate_load_store_multiple_thumb(u16 opcode, u32 address, arm_instruction_ return ERROR_OK; } -int evaluate_cond_branch_thumb(u16 opcode, u32 address, arm_instruction_t *instruction) +int evaluate_cond_branch_thumb(uint16_t opcode, u32 address, arm_instruction_t *instruction) { u32 offset = opcode & 0xff; uint8_t cond = (opcode >> 8) & 0xf; @@ -1971,7 +1971,7 @@ int evaluate_cond_branch_thumb(u16 opcode, u32 address, arm_instruction_t *instr return ERROR_OK; } -int thumb_evaluate_opcode(u16 opcode, u32 address, arm_instruction_t *instruction) +int thumb_evaluate_opcode(uint16_t opcode, u32 address, arm_instruction_t *instruction) { /* clear fields, to avoid confusion */ memset(instruction, 0, sizeof(arm_instruction_t)); diff --git a/src/target/arm_disassembler.h b/src/target/arm_disassembler.h index d3101cb6..94da06cf 100644 --- a/src/target/arm_disassembler.h +++ b/src/target/arm_disassembler.h @@ -195,7 +195,7 @@ typedef struct arm_instruction_s } arm_instruction_t; extern int arm_evaluate_opcode(u32 opcode, u32 address, arm_instruction_t *instruction); -extern int thumb_evaluate_opcode(u16 opcode, u32 address, arm_instruction_t *instruction); +extern int thumb_evaluate_opcode(uint16_t opcode, u32 address, arm_instruction_t *instruction); extern int arm_access_size(arm_instruction_t *instruction); #define COND(opcode) (arm_condition_strings[(opcode & 0xf0000000)>>28]) diff --git a/src/target/arm_jtag.c b/src/target/arm_jtag.c index 3c1bb0af..ea6f4ca0 100644 --- a/src/target/arm_jtag.c +++ b/src/target/arm_jtag.c @@ -130,7 +130,7 @@ int arm_jtag_buf_to_le32_flip(uint8_t *in_buf, void *priv, struct scan_field_s * return ERROR_OK; } -/* read JTAG buffer into little-endian u16, flipping bit-order */ +/* read JTAG buffer into little-endian uint16_t, flipping bit-order */ int arm_jtag_buf_to_le16_flip(uint8_t *in_buf, void *priv, struct scan_field_s *field) { h_u16_to_le(((uint8_t*)priv), flip_u32(le_to_h_u32(in_buf), 32) & 0xffff); @@ -144,7 +144,7 @@ int arm_jtag_buf_to_be32_flip(uint8_t *in_buf, void *priv, struct scan_field_s * return ERROR_OK; } -/* read JTAG buffer into big-endian u16, flipping bit-order */ +/* read JTAG buffer into big-endian uint16_t, flipping bit-order */ int arm_jtag_buf_to_be16_flip(uint8_t *in_buf, void *priv, struct scan_field_s *field) { h_u16_to_be(((uint8_t*)priv), flip_u32(le_to_h_u32(in_buf), 32) & 0xffff); @@ -175,7 +175,7 @@ int arm_jtag_buf_to_le32(uint8_t *in_buf, void *priv, struct scan_field_s *field return ERROR_OK; } -/* read JTAG buffer into little-endian u16 */ +/* read JTAG buffer into little-endian uint16_t */ int arm_jtag_buf_to_le16(uint8_t *in_buf, void *priv, struct scan_field_s *field) { h_u16_to_le(((uint8_t*)priv), le_to_h_u32(in_buf) & 0xffff); @@ -189,7 +189,7 @@ int arm_jtag_buf_to_be32(uint8_t *in_buf, void *priv, struct scan_field_s *field return ERROR_OK; } -/* read JTAG buffer into big-endian u16 */ +/* read JTAG buffer into big-endian uint16_t */ int arm_jtag_buf_to_be16(uint8_t *in_buf, void *priv, struct scan_field_s *field) { h_u16_to_be(((uint8_t*)priv), le_to_h_u32(in_buf) & 0xffff); diff --git a/src/target/arm_simulator.c b/src/target/arm_simulator.c index 186190b4..163c87b9 100644 --- a/src/target/arm_simulator.c +++ b/src/target/arm_simulator.c @@ -258,7 +258,7 @@ int pass_condition(u32 cpsr, u32 opcode) return 0; } -int thumb_pass_branch_condition(u32 cpsr, u16 opcode) +int thumb_pass_branch_condition(u32 cpsr, uint16_t opcode) { return pass_condition(cpsr, (opcode & 0x0f00) << 20); } @@ -307,7 +307,7 @@ int arm_simulate_step(target_t *target, u32 *dry_run_pc) } else { - u16 opcode; + uint16_t opcode; if((retval = target_read_u16(target, current_pc, &opcode)) != ERROR_OK) { diff --git a/src/target/armv4_5.c b/src/target/armv4_5.c index 1b611bae..4a3e7cb7 100644 --- a/src/target/armv4_5.c +++ b/src/target/armv4_5.c @@ -393,7 +393,7 @@ int handle_armv4_5_disassemble_command(struct command_context_s *cmd_ctx, char * int i; arm_instruction_t cur_instruction; u32 opcode; - u16 thumb_opcode; + uint16_t thumb_opcode; int thumb = 0; if (armv4_5->common_magic != ARMV4_5_COMMON_MAGIC) diff --git a/src/target/armv7m.c b/src/target/armv7m.c index 5122462f..e893a84b 100644 --- a/src/target/armv7m.c +++ b/src/target/armv7m.c @@ -560,7 +560,7 @@ int armv7m_checksum_memory(struct target_s *target, u32 address, u32 count, u32* reg_param_t reg_params[2]; int retval; - u16 cortex_m3_crc_code[] = { + uint16_t cortex_m3_crc_code[] = { 0x4602, /* mov r2, r0 */ 0xF04F, 0x30FF, /* mov r0, #0xffffffff */ 0x460B, /* mov r3, r1 */ @@ -599,8 +599,8 @@ int armv7m_checksum_memory(struct target_s *target, u32 address, u32 count, u32* } /* convert flash writing code into a buffer in target endianness */ - for (i = 0; i < (sizeof(cortex_m3_crc_code)/sizeof(u16)); i++) - if((retval = target_write_u16(target, crc_algorithm->address + i*sizeof(u16), cortex_m3_crc_code[i])) != ERROR_OK) + for (i = 0; i < (sizeof(cortex_m3_crc_code)/sizeof(uint16_t)); i++) + if((retval = target_write_u16(target, crc_algorithm->address + i*sizeof(uint16_t), cortex_m3_crc_code[i])) != ERROR_OK) { return retval; } @@ -642,7 +642,7 @@ int armv7m_blank_check_memory(struct target_s *target, u32 address, u32 count, u int retval; u32 i; - u16 erase_check_code[] = + uint16_t erase_check_code[] = { /* loop: */ 0xF810, 0x3B01, /* ldrb r3, [r0], #1 */ @@ -660,8 +660,8 @@ int armv7m_blank_check_memory(struct target_s *target, u32 address, u32 count, u } /* convert flash writing code into a buffer in target endianness */ - for (i = 0; i < (sizeof(erase_check_code)/sizeof(u16)); i++) - target_write_u16(target, erase_check_algorithm->address + i*sizeof(u16), erase_check_code[i]); + for (i = 0; i < (sizeof(erase_check_code)/sizeof(uint16_t)); i++) + target_write_u16(target, erase_check_algorithm->address + i*sizeof(uint16_t), erase_check_code[i]); armv7m_info.common_magic = ARMV7M_COMMON_MAGIC; armv7m_info.core_mode = ARMV7M_MODE_ANY; diff --git a/src/target/avrt.c b/src/target/avrt.c index 0fe29204..e0239bb7 100644 --- a/src/target/avrt.c +++ b/src/target/avrt.c @@ -54,8 +54,8 @@ int mcu_write_ir(jtag_tap_t *tap, uint8_t *ir_in, uint8_t *ir_out, int ir_len, i int mcu_write_dr(jtag_tap_t *tap, uint8_t *dr_in, uint8_t *dr_out, int dr_len, int rti); int mcu_write_ir_u8(jtag_tap_t *tap, uint8_t *ir_in, uint8_t ir_out, int ir_len, int rti); int mcu_write_dr_u8(jtag_tap_t *tap, uint8_t *ir_in, uint8_t ir_out, int dr_len, int rti); -int mcu_write_ir_u16(jtag_tap_t *tap, u16 *ir_in, u16 ir_out, int ir_len, int rti); -int mcu_write_dr_u16(jtag_tap_t *tap, u16 *ir_in, u16 ir_out, int dr_len, int rti); +int mcu_write_ir_u16(jtag_tap_t *tap, uint16_t *ir_in, uint16_t ir_out, int ir_len, int rti); +int mcu_write_dr_u16(jtag_tap_t *tap, uint16_t *ir_in, uint16_t ir_out, int dr_len, int rti); int mcu_write_ir_u32(jtag_tap_t *tap, u32 *ir_in, u32 ir_out, int ir_len, int rti); int mcu_write_dr_u32(jtag_tap_t *tap, u32 *ir_in, u32 ir_out, int dr_len, int rti); int mcu_execute_queue(void); @@ -271,7 +271,7 @@ int mcu_write_dr_u8(jtag_tap_t *tap, uint8_t *dr_in, uint8_t dr_out, int dr_len, return ERROR_OK; } -int mcu_write_ir_u16(jtag_tap_t *tap, u16 *ir_in, u16 ir_out, int ir_len, int rti) +int mcu_write_ir_u16(jtag_tap_t *tap, uint16_t *ir_in, uint16_t ir_out, int ir_len, int rti) { if (ir_len > 16) { @@ -284,7 +284,7 @@ int mcu_write_ir_u16(jtag_tap_t *tap, u16 *ir_in, u16 ir_out, int ir_len, int rt return ERROR_OK; } -int mcu_write_dr_u16(jtag_tap_t *tap, u16 *dr_in, u16 dr_out, int dr_len, int rti) +int mcu_write_dr_u16(jtag_tap_t *tap, uint16_t *dr_in, uint16_t dr_out, int dr_len, int rti) { if (dr_len > 16) { diff --git a/src/target/cortex_a8.c b/src/target/cortex_a8.c index b5d1f5a1..5728c6aa 100644 --- a/src/target/cortex_a8.c +++ b/src/target/cortex_a8.c @@ -85,7 +85,7 @@ target_type_t cortexa8_target = int cortex_a8_dcc_read(swjdp_common_t *swjdp, uint8_t *value, uint8_t *ctrl) { - u16 dcrdr; + uint16_t dcrdr; mem_ap_read_buf_u16( swjdp, (uint8_t*)&dcrdr, 1, DCB_DCRDR); *ctrl = (uint8_t)dcrdr; diff --git a/src/target/cortex_m3.c b/src/target/cortex_m3.c index 94c4028b..9c8db02b 100644 --- a/src/target/cortex_m3.c +++ b/src/target/cortex_m3.c @@ -1489,7 +1489,7 @@ int cortex_m3_quit(void) int cortex_m3_dcc_read(swjdp_common_t *swjdp, uint8_t *value, uint8_t *ctrl) { - u16 dcrdr; + uint16_t dcrdr; mem_ap_read_buf_u16( swjdp, (uint8_t*)&dcrdr, 1, DCB_DCRDR); *ctrl = (uint8_t)dcrdr; diff --git a/src/target/etm.h b/src/target/etm.h index 3e32fd27..72079598 100644 --- a/src/target/etm.h +++ b/src/target/etm.h @@ -128,7 +128,7 @@ enum typedef struct etmv1_trace_data_s { uint8_t pipestat; /* bits 0-2 pipeline status */ - u16 packet; /* packet data (4, 8 or 16 bit) */ + uint16_t packet; /* packet data (4, 8 or 16 bit) */ int flags; /* ETMV1_TRACESYNC_CYCLE, ETMV1_TRIGGER_CYCLE */ } etmv1_trace_data_t; diff --git a/src/target/feroceon.c b/src/target/feroceon.c index a0dcce95..7e3e2991 100644 --- a/src/target/feroceon.c +++ b/src/target/feroceon.c @@ -239,7 +239,7 @@ void feroceon_read_core_regs_target_buffer(target_t *target, u32 mask, void* buf arm_jtag_t *jtag_info = &arm7_9->jtag_info; int be = (target->endianness == TARGET_BIG_ENDIAN) ? 1 : 0; u32 *buf_u32 = buffer; - u16 *buf_u16 = buffer; + uint16_t *buf_u16 = buffer; uint8_t *buf_u8 = buffer; arm9tdmi_clock_out(jtag_info, ARMV4_5_STMIA(0, mask & 0xffff, 0, 0), 0, NULL, 0); diff --git a/src/target/image.c b/src/target/image.c index af1c4e21..f944cf1d 100644 --- a/src/target/image.c +++ b/src/target/image.c @@ -236,7 +236,7 @@ static int image_ihex_buffer_complete(image_t *image) } else if (record_type == 2) /* Linear Address Record */ { - u16 upper_address; + uint16_t upper_address; sscanf(&lpszLine[bytes_read], "%4hx", &upper_address); cal_checksum += (uint8_t)(upper_address >> 8); @@ -276,7 +276,7 @@ static int image_ihex_buffer_complete(image_t *image) } else if (record_type == 4) /* Extended Linear Address Record */ { - u16 upper_address; + uint16_t upper_address; sscanf(&lpszLine[bytes_read], "%4hx", &upper_address); cal_checksum += (uint8_t)(upper_address >> 8); diff --git a/src/target/mips32_dmaacc.c b/src/target/mips32_dmaacc.c index edb7b53b..e9cb7bbe 100644 --- a/src/target/mips32_dmaacc.c +++ b/src/target/mips32_dmaacc.c @@ -85,7 +85,7 @@ begin_ejtag_dma_read: return ERROR_OK; } -static int ejtag_dma_read_h(mips_ejtag_t *ejtag_info, u32 addr, u16 *data) +static int ejtag_dma_read_h(mips_ejtag_t *ejtag_info, u32 addr, uint16_t *data) { u32 v; u32 ejtag_ctrl; @@ -356,7 +356,7 @@ int mips32_dmaacc_read_mem(mips_ejtag_t *ejtag_info, u32 addr, int size, int cou case 1: return mips32_dmaacc_read_mem8(ejtag_info, addr, count, (uint8_t*)buf); case 2: - return mips32_dmaacc_read_mem16(ejtag_info, addr, count, (u16*)buf); + return mips32_dmaacc_read_mem16(ejtag_info, addr, count, (uint16_t*)buf); case 4: return mips32_dmaacc_read_mem32(ejtag_info, addr, count, (u32*)buf); } @@ -377,7 +377,7 @@ int mips32_dmaacc_read_mem32(mips_ejtag_t *ejtag_info, u32 addr, int count, u32 return ERROR_OK; } -int mips32_dmaacc_read_mem16(mips_ejtag_t *ejtag_info, u32 addr, int count, u16 *buf) +int mips32_dmaacc_read_mem16(mips_ejtag_t *ejtag_info, u32 addr, int count, uint16_t *buf) { int i; int retval; @@ -410,7 +410,7 @@ int mips32_dmaacc_write_mem(mips_ejtag_t *ejtag_info, u32 addr, int size, int co case 1: return mips32_dmaacc_write_mem8(ejtag_info, addr, count, (uint8_t*)buf); case 2: - return mips32_dmaacc_write_mem16(ejtag_info, addr, count,(u16*)buf); + return mips32_dmaacc_write_mem16(ejtag_info, addr, count,(uint16_t*)buf); case 4: return mips32_dmaacc_write_mem32(ejtag_info, addr, count, (u32*)buf); } @@ -431,7 +431,7 @@ int mips32_dmaacc_write_mem32(mips_ejtag_t *ejtag_info, u32 addr, int count, u32 return ERROR_OK; } -int mips32_dmaacc_write_mem16(mips_ejtag_t *ejtag_info, u32 addr, int count, u16 *buf) +int mips32_dmaacc_write_mem16(mips_ejtag_t *ejtag_info, u32 addr, int count, uint16_t *buf) { int i; int retval; diff --git a/src/target/mips32_dmaacc.h b/src/target/mips32_dmaacc.h index 57941928..4283eb59 100644 --- a/src/target/mips32_dmaacc.h +++ b/src/target/mips32_dmaacc.h @@ -38,11 +38,11 @@ extern int mips32_dmaacc_read_mem(mips_ejtag_t *ejtag_info, u32 addr, int size, extern int mips32_dmaacc_write_mem(mips_ejtag_t *ejtag_info, u32 addr, int size, int count, void *buf); extern int mips32_dmaacc_read_mem8(mips_ejtag_t *ejtag_info, u32 addr, int count, uint8_t *buf); -extern int mips32_dmaacc_read_mem16(mips_ejtag_t *ejtag_info, u32 addr, int count, u16 *buf); +extern int mips32_dmaacc_read_mem16(mips_ejtag_t *ejtag_info, u32 addr, int count, uint16_t *buf); extern int mips32_dmaacc_read_mem32(mips_ejtag_t *ejtag_info, u32 addr, int count, u32 *buf); extern int mips32_dmaacc_write_mem8(mips_ejtag_t *ejtag_info, u32 addr, int count, uint8_t *buf); -extern int mips32_dmaacc_write_mem16(mips_ejtag_t *ejtag_info, u32 addr, int count, u16 *buf); +extern int mips32_dmaacc_write_mem16(mips_ejtag_t *ejtag_info, u32 addr, int count, uint16_t *buf); extern int mips32_dmaacc_write_mem32(mips_ejtag_t *ejtag_info, u32 addr, int count, u32 *buf); #endif diff --git a/src/target/mips32_pracc.c b/src/target/mips32_pracc.c index 2ac16c10..db364bb4 100644 --- a/src/target/mips32_pracc.c +++ b/src/target/mips32_pracc.c @@ -276,7 +276,7 @@ int mips32_pracc_read_mem(mips_ejtag_t *ejtag_info, u32 addr, int size, int coun case 1: return mips32_pracc_read_mem8(ejtag_info, addr, count, (uint8_t*)buf); case 2: - return mips32_pracc_read_mem16(ejtag_info, addr, count, (u16*)buf); + return mips32_pracc_read_mem16(ejtag_info, addr, count, (uint16_t*)buf); case 4: if(count==1) return mips32_pracc_read_u32(ejtag_info, addr, (u32*)buf); @@ -395,7 +395,7 @@ int mips32_pracc_read_u32(mips_ejtag_t *ejtag_info, u32 addr, u32 *buf) return retval; } -int mips32_pracc_read_mem16(mips_ejtag_t *ejtag_info, u32 addr, int count, u16 *buf) +int mips32_pracc_read_mem16(mips_ejtag_t *ejtag_info, u32 addr, int count, uint16_t *buf) { u32 code[] = { /* start: */ @@ -560,7 +560,7 @@ int mips32_pracc_write_mem(mips_ejtag_t *ejtag_info, u32 addr, int size, int cou case 1: return mips32_pracc_write_mem8(ejtag_info, addr, count, (uint8_t*)buf); case 2: - return mips32_pracc_write_mem16(ejtag_info, addr, count,(u16*)buf); + return mips32_pracc_write_mem16(ejtag_info, addr, count,(uint16_t*)buf); case 4: if(count==1) return mips32_pracc_write_u32(ejtag_info, addr, (u32*)buf); @@ -653,7 +653,7 @@ int mips32_pracc_write_u32(mips_ejtag_t *ejtag_info, u32 addr, u32 *buf) return ERROR_OK; } -int mips32_pracc_write_mem16(mips_ejtag_t *ejtag_info, u32 addr, int count, u16 *buf) +int mips32_pracc_write_mem16(mips_ejtag_t *ejtag_info, u32 addr, int count, uint16_t *buf) { u32 code[] = { /* start: */ diff --git a/src/target/mips32_pracc.h b/src/target/mips32_pracc.h index da0274b8..2b39d934 100644 --- a/src/target/mips32_pracc.h +++ b/src/target/mips32_pracc.h @@ -41,12 +41,12 @@ extern int mips32_pracc_read_mem(mips_ejtag_t *ejtag_info, u32 addr, int size, i extern int mips32_pracc_write_mem(mips_ejtag_t *ejtag_info, u32 addr, int size, int count, void *buf); extern int mips32_pracc_read_mem8(mips_ejtag_t *ejtag_info, u32 addr, int count, uint8_t *buf); -extern int mips32_pracc_read_mem16(mips_ejtag_t *ejtag_info, u32 addr, int count, u16 *buf); +extern int mips32_pracc_read_mem16(mips_ejtag_t *ejtag_info, u32 addr, int count, uint16_t *buf); extern int mips32_pracc_read_mem32(mips_ejtag_t *ejtag_info, u32 addr, int count, u32 *buf); extern int mips32_pracc_read_u32(mips_ejtag_t *ejtag_info, u32 addr, u32 *buf); extern int mips32_pracc_write_mem8(mips_ejtag_t *ejtag_info, u32 addr, int count, uint8_t *buf); -extern int mips32_pracc_write_mem16(mips_ejtag_t *ejtag_info, u32 addr, int count, u16 *buf); +extern int mips32_pracc_write_mem16(mips_ejtag_t *ejtag_info, u32 addr, int count, uint16_t *buf); extern int mips32_pracc_write_mem32(mips_ejtag_t *ejtag_info, u32 addr, int count, u32 *buf); extern int mips32_pracc_write_u32(mips_ejtag_t *ejtag_info, u32 addr, u32 *buf); diff --git a/src/target/mips_m4k.c b/src/target/mips_m4k.c index d344c328..fe99773d 100644 --- a/src/target/mips_m4k.c +++ b/src/target/mips_m4k.c @@ -552,7 +552,7 @@ int mips_m4k_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint) } else { - u16 verify = 0xffff; + uint16_t verify = 0xffff; if((retval = target_read_memory(target, breakpoint->address, breakpoint->length, 1, breakpoint->orig_instr)) != ERROR_OK) { @@ -627,7 +627,7 @@ int mips_m4k_unset_breakpoint(struct target_s *target, breakpoint_t *breakpoint) } else { - u16 current_instr; + uint16_t current_instr; /* check that user program has not modified breakpoint instruction */ if ((retval = target_read_memory(target, breakpoint->address, 2, 1, (uint8_t*)¤t_instr)) != ERROR_OK) @@ -761,7 +761,7 @@ int mips_m4k_read_memory(struct target_s *target, u32 address, u32 size, u32 cou if (target->endianness == TARGET_BIG_ENDIAN) { u32 i, t32; - u16 t16; + uint16_t t16; for(i = 0; i < (count*size); i += size) { @@ -806,7 +806,7 @@ int mips_m4k_write_memory(struct target_s *target, u32 address, u32 size, u32 co if (target->endianness == TARGET_BIG_ENDIAN) { u32 i, t32; - u16 t16; + uint16_t t16; for(i = 0; i < (count*size); i += size) { diff --git a/src/target/target.c b/src/target/target.c index 6795b179..4ee91570 100644 --- a/src/target/target.c +++ b/src/target/target.c @@ -280,8 +280,8 @@ u32 target_buffer_get_u32(target_t *target, const uint8_t *buffer) return be_to_h_u32(buffer); } -/* read a u16 from a buffer in target memory endianness */ -u16 target_buffer_get_u16(target_t *target, const uint8_t *buffer) +/* read a uint16_t from a buffer in target memory endianness */ +uint16_t target_buffer_get_u16(target_t *target, const uint8_t *buffer) { if (target->endianness == TARGET_LITTLE_ENDIAN) return le_to_h_u16(buffer); @@ -304,8 +304,8 @@ void target_buffer_set_u32(target_t *target, uint8_t *buffer, u32 value) h_u32_to_be(buffer, value); } -/* write a u16 to a buffer in target memory endianness */ -void target_buffer_set_u16(target_t *target, uint8_t *buffer, u16 value) +/* write a uint16_t to a buffer in target memory endianness */ +void target_buffer_set_u16(target_t *target, uint8_t *buffer, uint16_t value) { if (target->endianness == TARGET_LITTLE_ENDIAN) h_u16_to_le(buffer, value); @@ -1328,7 +1328,7 @@ int target_read_u32(struct target_s *target, u32 address, u32 *value) return retval; } -int target_read_u16(struct target_s *target, u32 address, u16 *value) +int target_read_u16(struct target_s *target, u32 address, uint16_t *value) { uint8_t value_buf[2]; if (!target_was_examined(target)) @@ -1396,7 +1396,7 @@ int target_write_u32(struct target_s *target, u32 address, u32 value) return retval; } -int target_write_u16(struct target_s *target, u32 address, u16 value) +int target_write_u16(struct target_s *target, u32 address, uint16_t value) { int retval; uint8_t value_buf[2]; diff --git a/src/target/target.h b/src/target/target.h index ad1699d3..b2e4c61e 100644 --- a/src/target/target.h +++ b/src/target/target.h @@ -380,17 +380,17 @@ extern target_event_callback_t *target_event_callbacks; extern target_timer_callback_t *target_timer_callbacks; extern u32 target_buffer_get_u32(target_t *target, const uint8_t *buffer); -extern u16 target_buffer_get_u16(target_t *target, const uint8_t *buffer); +extern uint16_t target_buffer_get_u16(target_t *target, const uint8_t *buffer); extern uint8_t target_buffer_get_u8 (target_t *target, const uint8_t *buffer); extern void target_buffer_set_u32(target_t *target, uint8_t *buffer, u32 value); -extern void target_buffer_set_u16(target_t *target, uint8_t *buffer, u16 value); +extern void target_buffer_set_u16(target_t *target, uint8_t *buffer, uint16_t value); extern void target_buffer_set_u8 (target_t *target, uint8_t *buffer, uint8_t value); int target_read_u32(struct target_s *target, u32 address, u32 *value); -int target_read_u16(struct target_s *target, u32 address, u16 *value); +int target_read_u16(struct target_s *target, u32 address, uint16_t *value); int target_read_u8(struct target_s *target, u32 address, uint8_t *value); int target_write_u32(struct target_s *target, u32 address, u32 value); -int target_write_u16(struct target_s *target, u32 address, u16 value); +int target_write_u16(struct target_s *target, u32 address, uint16_t value); int target_write_u8(struct target_s *target, u32 address, uint8_t value); /* Issues USER() statements with target state information */ diff --git a/src/target/xscale.h b/src/target/xscale.h index cfc74b86..fd4bddf2 100644 --- a/src/target/xscale.h +++ b/src/target/xscale.h @@ -125,7 +125,7 @@ typedef struct xscale_common_s int ibcr0_used; int ibcr1_used; u32 arm_bkpt; - u16 thumb_bkpt; + uint16_t thumb_bkpt; uint8_t vector_catch; -- cgit v1.2.3