From 6c0553c8c504d4c6da20857abeec80648d841b72 Mon Sep 17 00:00:00 2001
From: oharboe <oharboe@b42882b7-edfa-0310-969c-e2dbd0fdcd60>
Date: Sun, 20 Jul 2008 17:04:58 +0000
Subject: openocd@duaneellis.com fix naming confusion. Use ocd_ prefix for ocd
 API consistently.

git-svn-id: svn://svn.berlios.de/openocd/trunk@839 b42882b7-edfa-0310-969c-e2dbd0fdcd60
---
 src/tcl/chip/atmel/at91/aic.tcl |  4 ++--
 src/tcl/memory.tcl              | 12 ++++++------
 2 files changed, 8 insertions(+), 8 deletions(-)

(limited to 'src/tcl')

diff --git a/src/tcl/chip/atmel/at91/aic.tcl b/src/tcl/chip/atmel/at91/aic.tcl
index 245224a5..1fe4514b 100644
--- a/src/tcl/chip/atmel/at91/aic.tcl
+++ b/src/tcl/chip/atmel/at91/aic.tcl
@@ -54,7 +54,7 @@ proc show_AIC_IMR_helper { NAME ADDR VAL } {
 
 proc show_AIC { } {
     global AIC_SMR
-    if [catch { mem2array aaa 32 $AIC_SMR [expr 32 * 4] } msg ] {
+    if [catch { ocd_mem2array aaa 32 $AIC_SMR [expr 32 * 4] } msg ] {
 	error [format "%s (%s)" $msg AIC_SMR]
     }
     puts "AIC_SMR: Mode & Type"
@@ -71,7 +71,7 @@ proc show_AIC { } {
 	incr x
     }
     global AIC_SVR
-    if [catch { mem2array aaa 32 $AIC_SVR [expr 32 * 4] } msg ] {
+    if [catch { ocd_mem2array aaa 32 $AIC_SVR [expr 32 * 4] } msg ] {
 	error [format "%s (%s)" $msg AIC_SVR]
     }
     puts "AIC_SVR: Vectors"
diff --git a/src/tcl/memory.tcl b/src/tcl/memory.tcl
index 42cd0627..219d39fa 100644
--- a/src/tcl/memory.tcl
+++ b/src/tcl/memory.tcl
@@ -80,7 +80,7 @@ proc address_info { ADDRESS } {
 
 proc memread32 {ADDR} {
     set foo(0) 0
-    if ![ catch { mem2array foo 32 $ADDR 1  } msg ] {
+    if ![ catch { ocd_mem2array foo 32 $ADDR 1  } msg ] {
 	return $foo(0)
     } else {
 	error "memread32: $msg"
@@ -89,7 +89,7 @@ proc memread32 {ADDR} {
 
 proc memread16 {ADDR} {
     set foo(0) 0
-    if ![ catch { mem2array foo 16 $ADDR 1  } msg ] {
+    if ![ catch { ocd_mem2array foo 16 $ADDR 1  } msg ] {
 	return $foo(0)
     } else {
 	error "memread16: $msg"
@@ -98,7 +98,7 @@ proc memread16 {ADDR} {
 
 proc memread8 {ADDR} {
     set foo(0) 0
-    if ![ catch { mem2array foo 8 $ADDR 1  } msg ] {
+    if ![ catch { ocd_mem2array foo 8 $ADDR 1  } msg ] {
 	return $foo(0)
     } else {
 	error "memread8: $msg"
@@ -107,7 +107,7 @@ proc memread8 {ADDR} {
 
 proc memwrite32 {ADDR DATA} {
     set foo(0) $DATA
-    if ![ catch { array2mem foo 32 $ADDR 1  } msg ] {
+    if ![ catch { ocd_array2mem foo 32 $ADDR 1  } msg ] {
 	return $foo(0)
     } else {
 	error "memwrite32: $msg"
@@ -116,7 +116,7 @@ proc memwrite32 {ADDR DATA} {
 
 proc memwrite16 {ADDR DATA} {
     set foo(0) $DATA
-    if ![ catch { array2mem foo 16 $ADDR 1  } msg ] {
+    if ![ catch { ocd_array2mem foo 16 $ADDR 1  } msg ] {
 	return $foo(0)
     } else {
 	error "memwrite16: $msg"
@@ -125,7 +125,7 @@ proc memwrite16 {ADDR DATA} {
 
 proc memwrite8 {ADDR DATA} {
     set foo(0) $DATA
-    if ![ catch { array2mem foo 8 $ADDR 1  } msg ] {
+    if ![ catch { ocd_array2mem foo 8 $ADDR 1  } msg ] {
 	return $foo(0)
     } else {
 	error "memwrite8: $msg"
-- 
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