From 719f9ecde32ab60bcb65913454a9340c5754cee4 Mon Sep 17 00:00:00 2001
From: Drasko DRASKOVIC <drasko.draskovic@gmail.com>
Date: Mon, 4 Apr 2011 15:33:04 +0200
Subject: Added mips_ejtag_drscan_32_out() for optimization.
---
src/target/mips32_pracc.c | 10 +++++-----
src/target/mips_ejtag.c | 15 +++++++++++++++
src/target/mips_ejtag.h | 1 +
src/target/mips_m4k.c | 2 +-
4 files changed, 22 insertions(+), 6 deletions(-)
(limited to 'src')
diff --git a/src/target/mips32_pracc.c b/src/target/mips32_pracc.c
index ef132fe3..178f68e1 100644
--- a/src/target/mips32_pracc.c
+++ b/src/target/mips32_pracc.c
@@ -188,12 +188,12 @@ static int mips32_pracc_exec_read(struct mips32_pracc_context *ctx, uint32_t add
/* Send the data out */
mips_ejtag_set_instr(ctx->ejtag_info, EJTAG_INST_DATA);
- mips_ejtag_drscan_32(ctx->ejtag_info, &data);
+ mips_ejtag_drscan_32_out(ctx->ejtag_info, data);
/* Clear the access pending bit (let the processor eat!) */
ejtag_ctrl = ejtag_info->ejtag_ctrl & ~EJTAG_CTRL_PRACC;
mips_ejtag_set_instr(ctx->ejtag_info, EJTAG_INST_CONTROL);
- mips_ejtag_drscan_32(ctx->ejtag_info, &ejtag_ctrl);
+ mips_ejtag_drscan_32_out(ctx->ejtag_info, ejtag_ctrl);
return jtag_execute_queue();
}
@@ -213,7 +213,7 @@ static int mips32_pracc_exec_write(struct mips32_pracc_context *ctx, uint32_t ad
/* Clear access pending bit */
ejtag_ctrl = ejtag_info->ejtag_ctrl & ~EJTAG_CTRL_PRACC;
mips_ejtag_set_instr(ctx->ejtag_info, EJTAG_INST_CONTROL);
- mips_ejtag_drscan_32(ctx->ejtag_info, &ejtag_ctrl);
+ mips_ejtag_drscan_32_out(ctx->ejtag_info, ejtag_ctrl);
retval = jtag_execute_queue();
if (retval != ERROR_OK)
@@ -1026,12 +1026,12 @@ int mips32_pracc_fastdata_xfer(struct mips_ejtag *ejtag_info, struct working_are
return retval;
mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA);
- mips_ejtag_drscan_32(ejtag_info, &jmp_code[i]);
+ mips_ejtag_drscan_32_out(ejtag_info, jmp_code[i]);
/* Clear the access pending bit (let the processor eat!) */
ejtag_ctrl = ejtag_info->ejtag_ctrl & ~EJTAG_CTRL_PRACC;
mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
- mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
+ mips_ejtag_drscan_32_out(ejtag_info, ejtag_ctrl);
}
if ((retval = wait_for_pracc_rw(ejtag_info, &ejtag_ctrl)) != ERROR_OK)
diff --git a/src/target/mips_ejtag.c b/src/target/mips_ejtag.c
index 087be076..6229055d 100644
--- a/src/target/mips_ejtag.c
+++ b/src/target/mips_ejtag.c
@@ -121,6 +121,21 @@ int mips_ejtag_drscan_32(struct mips_ejtag *ejtag_info, uint32_t *data)
return ERROR_OK;
}
+void mips_ejtag_drscan_32_out(struct mips_ejtag *ejtag_info, uint32_t data)
+{
+ struct jtag_tap *tap;
+ tap = ejtag_info->tap;
+ assert(tap != NULL);
+
+ struct scan_field field;
+
+ field.num_bits = 32;
+ field.out_value = (uint8_t *)&data;
+ field.in_value = NULL;
+
+ jtag_add_dr_scan(tap, 1, &field, TAP_IDLE);
+}
+
int mips_ejtag_drscan_8(struct mips_ejtag *ejtag_info, uint32_t *data)
{
struct jtag_tap *tap;
diff --git a/src/target/mips_ejtag.h b/src/target/mips_ejtag.h
index aa890d2b..a6ed95a5 100644
--- a/src/target/mips_ejtag.h
+++ b/src/target/mips_ejtag.h
@@ -136,6 +136,7 @@ void mips_ejtag_set_instr(struct mips_ejtag *ejtag_info,
int mips_ejtag_enter_debug(struct mips_ejtag *ejtag_info);
int mips_ejtag_exit_debug(struct mips_ejtag *ejtag_info);
int mips_ejtag_get_idcode(struct mips_ejtag *ejtag_info, uint32_t *idcode);
+void mips_ejtag_drscan_32_out(struct mips_ejtag *ejtag_info, uint32_t data);
int mips_ejtag_drscan_32(struct mips_ejtag *ejtag_info, uint32_t *data);
void mips_ejtag_drscan_8_out(struct mips_ejtag *ejtag_info, uint8_t data);
int mips_ejtag_drscan_8(struct mips_ejtag *ejtag_info, uint32_t *data);
diff --git a/src/target/mips_m4k.c b/src/target/mips_m4k.c
index 74d0d503..1166b874 100644
--- a/src/target/mips_m4k.c
+++ b/src/target/mips_m4k.c
@@ -274,7 +274,7 @@ static int mips_m4k_assert_reset(struct target *target)
uint32_t ejtag_ctrl = ejtag_info->ejtag_ctrl | EJTAG_CTRL_PRRST | EJTAG_CTRL_PERRST;
LOG_DEBUG("Using EJTAG reset (PRRST) to reset processor...");
mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
- mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
+ mips_ejtag_drscan_32_out(ejtag_info, ejtag_ctrl);
}
}
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