From ba71e8c521a7e7c1652560f580f81d564e613508 Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Sat, 9 Apr 2011 18:06:36 +0200 Subject: at91: add chip register definition and generic init support for - pio - pmc - rstc - wdt - sdramc - smc Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD Cc: Nicolas Ferre Cc: Patrice Vilchez --- tcl/chip/atmel/at91/at91_rstc.cfg | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) create mode 100644 tcl/chip/atmel/at91/at91_rstc.cfg (limited to 'tcl/chip/atmel/at91/at91_rstc.cfg') diff --git a/tcl/chip/atmel/at91/at91_rstc.cfg b/tcl/chip/atmel/at91/at91_rstc.cfg new file mode 100644 index 00000000..ed608222 --- /dev/null +++ b/tcl/chip/atmel/at91/at91_rstc.cfg @@ -0,0 +1,21 @@ +set AT91_RSTC_CR [expr ($AT91_RSTC + 0x00)] ;# Reset Controller Control Register +set AT91_RSTC_PROCRST [expr (1 << 0)] ;# Processor Reset +set AT91_RSTC_PERRST [expr (1 << 2)] ;# Peripheral Reset +set AT91_RSTC_EXTRST [expr (1 << 3)] ;# External Reset +set AT91_RSTC_KEY [expr (0xa5 << 24)] ;# KEY Password + +set AT91_RSTC_SR [expr ($AT91_RSTC + 0x04)] ;# Reset Controller Status Register +set AT91_RSTC_URSTS [expr (1 << 0)] ;# User Reset Status +set AT91_RSTC_RSTTYP [expr (7 << 8)] ;# Reset Type +set AT91_RSTC_RSTTYP_GENERAL [expr (0 << 8)] +set AT91_RSTC_RSTTYP_WAKEUP [expr (1 << 8)] +set AT91_RSTC_RSTTYP_WATCHDOG [expr (2 << 8)] +set AT91_RSTC_RSTTYP_SOFTWARE [expr (3 << 8)] +set AT91_RSTC_RSTTYP_USER [expr (4 << 8)] +set AT91_RSTC_NRSTL [expr (1 << 16)] ;# NRST Pin Level +set AT91_RSTC_SRCMP [expr (1 << 17)] ;# Software Reset Command in Progress + +set AT91_RSTC_MR [expr ($AT91_RSTC + 0x08)] ;# Reset Controller Mode Register +set AT91_RSTC_URSTEN [expr (1 << 0)] ;# User Reset Enable +set AT91_RSTC_URSTIEN [expr (1 << 4)] ;# User Reset Interrupt Enable +set AT91_RSTC_ERSTL [expr (0xf << 8)] ;# External Reset Length -- cgit v1.2.3