From 30da7c67cec8b315972377b5389735ff11f6042c Mon Sep 17 00:00:00 2001 From: Antonio Borneo Date: Sun, 19 Dec 2010 01:22:53 +0800 Subject: TCL: fix non TCL comments End of line comments fixed with ';' before '#'. Added few additional 'space' to keep indentation in multi-line comments. Signed-off-by: Antonio Borneo --- tcl/chip/st/spear/spear310.tcl | 32 ++++++++++++++++---------------- 1 file changed, 16 insertions(+), 16 deletions(-) (limited to 'tcl/chip/st/spear/spear310.tcl') diff --git a/tcl/chip/st/spear/spear310.tcl b/tcl/chip/st/spear/spear310.tcl index b2c3676e..95df51d4 100644 --- a/tcl/chip/st/spear/spear310.tcl +++ b/tcl/chip/st/spear/spear310.tcl @@ -6,11 +6,11 @@ proc sp310_init {} { - mww 0xfca80034 0x0000ffff # enable all RAS clocks - mww 0xfca80040 0x00000000 # remove all RAS resets - mww 0xb4000008 0x00002ff4 # RAS function enable + mww 0xfca80034 0x0000ffff ;# enable all RAS clocks + mww 0xfca80040 0x00000000 ;# remove all RAS resets + mww 0xb4000008 0x00002ff4 ;# RAS function enable - mww 0xfca8013c 0x2f7bc210 # plgpio_pad_drv + mww 0xfca8013c 0x2f7bc210 ;# plgpio_pad_drv mww 0xfca80140 0x017bdef6 } @@ -21,20 +21,20 @@ proc sp310_emi_init {} { mmw 0xfca8013c 0x00039ce7 0x00000000 # set safe EMI timing as in BootROM - #mww 0x4f000000 0x0000000f # tAP_0_reg - #mww 0x4f000004 0x00000000 # tSDP_0_reg - #mww 0x4f000008 0x000000ff # tDPw_0_reg - #mww 0x4f00000c 0x00000111 # tDPr_0_reg - #mww 0x4f000010 0x00000002 # tDCS_0_reg + #mww 0x4f000000 0x0000000f ;# tAP_0_reg + #mww 0x4f000004 0x00000000 ;# tSDP_0_reg + #mww 0x4f000008 0x000000ff ;# tDPw_0_reg + #mww 0x4f00000c 0x00000111 ;# tDPr_0_reg + #mww 0x4f000010 0x00000002 ;# tDCS_0_reg # set fast EMI timing as in Linux - mww 0x4f000000 0x00000010 # tAP_0_reg - mww 0x4f000004 0x00000005 # tSDP_0_reg - mww 0x4f000008 0x0000000a # tDPw_0_reg - mww 0x4f00000c 0x0000000a # tDPr_0_reg - mww 0x4f000010 0x00000005 # tDCS_0_re + mww 0x4f000000 0x00000010 ;# tAP_0_reg + mww 0x4f000004 0x00000005 ;# tSDP_0_reg + mww 0x4f000008 0x0000000a ;# tDPw_0_reg + mww 0x4f00000c 0x0000000a ;# tDPr_0_reg + mww 0x4f000010 0x00000005 ;# tDCS_0_re # 32bit wide, 8/16/32bit access - mww 0x4f000014 0x0000000e # control_0_reg - mww 0x4f000094 0x0000003f # ack_reg + mww 0x4f000014 0x0000000e ;# control_0_reg + mww 0x4f000094 0x0000003f ;# ack_reg } -- cgit v1.2.3