From 43b38078787fd4f0753bdc3b150300d34678618a Mon Sep 17 00:00:00 2001
From: oharboe <oharboe@b42882b7-edfa-0310-969c-e2dbd0fdcd60>
Date: Fri, 25 Sep 2009 16:48:15 +0000
Subject: Michael Hasselberg <mh@open-engineering.de> target configuration
 files for Toshiba TX09 familiy

git-svn-id: svn://svn.berlios.de/openocd/trunk@2756 b42882b7-edfa-0310-969c-e2dbd0fdcd60
---
 tcl/target/tmpa910.cfg | 56 ++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 56 insertions(+)
 create mode 100644 tcl/target/tmpa910.cfg

(limited to 'tcl/target/tmpa910.cfg')

diff --git a/tcl/target/tmpa910.cfg b/tcl/target/tmpa910.cfg
new file mode 100644
index 00000000..3ed3253b
--- /dev/null
+++ b/tcl/target/tmpa910.cfg
@@ -0,0 +1,56 @@
+######################################
+# Target:    Toshiba TMPA910
+######################################
+
+if { [info exists CHIPNAME] } {	
+   set  _CHIPNAME $CHIPNAME    
+} else {	 
+   set  _CHIPNAME tmpa910
+}
+
+if { [info exists ENDIAN] } {	
+   set  _ENDIAN $ENDIAN    
+} else {	 
+   set  _ENDIAN little
+}
+
+if { [info exists CPUTAPID ] } {
+   set _CPUTAPID $CPUTAPID
+} else {
+  # force an error till we get a good number
+   set _CPUTAPID 0x07926031
+}
+
+#TMPA910 has following IDs:
+# CP15.0 register 0x41069265
+# CP15.1 register 0x1d152152
+# ARM core 0x07926031
+
+
+#
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+
+#use combined on interfaces or targets that can't set TRST/SRST separately
+reset_config trst_and_srst
+jtag_nsrst_delay 20
+jtag_ntrst_delay 20
+
+######################
+# Target configuration
+######################
+
+set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs
+
+# built-in RAM0
+#working_area 0 0xf8004000 0x4000 nobackup
+# built-in RAM1
+#working_area 1 0xf8008000 0x4000 nobackup
+# built-in RAM2
+#working_area 2 0xf800c000 0x4000 nobackup
+# built-in RAM 0-2 48k total
+#working_area 0 0xf8004000 0xc000 nobackup
+
+# Internal sram1 memory
+$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0xf8004000 -work-area-size 0xc000 \
+-work-area-backup 0
-- 
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