From 594abeb82bdcbd4bd079ec1a80c092076c55ccae Mon Sep 17 00:00:00 2001 From: zwelch Date: Tue, 9 Jun 2009 00:58:23 +0000 Subject: David Brownell : Add configuration for an old AT91rm9200 board, the Cogent CSB 337. Worth noting from the OpenOCD perspective: - It got a real hardware trace port connector; wired up here as much as we can, lacking inexpensive trace-aware dongles. - This is the first in-tree use of the "arm920t cp15" command. It adjusts the CPU clocking and enables i-cache, which gives more than 4x speedup after booting Linux; it's visible even just running U-Boot. git-svn-id: svn://svn.berlios.de/openocd/trunk@2134 b42882b7-edfa-0310-969c-e2dbd0fdcd60 --- tcl/target/str912.cfg | 66 +++++++++++++++++++++++++++++++++++---------------- 1 file changed, 45 insertions(+), 21 deletions(-) (limited to 'tcl/target') diff --git a/tcl/target/str912.cfg b/tcl/target/str912.cfg index 705326b5..776a8e6d 100644 --- a/tcl/target/str912.cfg +++ b/tcl/target/str912.cfg @@ -1,4 +1,6 @@ # script for str9 +# For more information about the configuration files, take a look at: +# openocd.texi if { [info exists CHIPNAME] } { set _CHIPNAME $CHIPNAME @@ -19,52 +21,74 @@ jtag_nsrst_delay 100 jtag_ntrst_delay 100 #use combined on interfaces or targets that can't set TRST/SRST separately -reset_config trst_and_srst +#reset_config trst_and_srst if { [info exists FLASHTAPID ] } { set _FLASHTAPID $FLASHTAPID } else { set _FLASHTAPID 0x04570041 } -jtag newtap $_CHIPNAME flash -irlen 8 -ircapture 0x1 -irmask 0x1 -expected-id $_FLASHTAPID +jtag newtap $_CHIPNAME flash \ + -irlen 8 -ircapture 0x1 -irmask 0x1 \ + -expected-id $_FLASHTAPID if { [info exists CPUTAPID ] } { set _CPUTAPID $CPUTAPID } else { set _CPUTAPID 0x25966041 } -jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID +jtag newtap $_CHIPNAME cpu \ + -irlen 4 -ircapture 0x1 -irmask 0xf \ + -expected-id $_CPUTAPID if { [info exists BSTAPID ] } { - set _BSTAPID $BSTAPID + set _BSTAPID1 $BSTAPID + set _BSTAPID2 $BSTAPID } else { - set _BSTAPID 0x1457f041 + set _BSTAPID1 0x1457f041 + set _BSTAPID2 0x2457f041 } -jtag newtap $_CHIPNAME bs -irlen 5 -ircapture 0x1 -irmask 0x1 -expected-id $_BSTAPID +jtag newtap $_CHIPNAME bs \ + -irlen 5 -ircapture 0x1 -irmask 0x1 \ + -expected-id $_BSTAPID1 -expected-id $_BSTAPID2 set _TARGETNAME [format "%s.cpu" $_CHIPNAME] -target create $_TARGETNAME arm966e -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm966e +target create $_TARGETNAME arm966e \ + -endian $_ENDIAN \ + -chain-position $_TARGETNAME \ + -variant arm966e $_TARGETNAME configure -event reset-start { jtag_rclk 16 } -$_TARGETNAME configure -event reset-init { - # We can increase speed now that we know the target is halted. - #jtag_rclk 3000 - - # -- Enable 96K RAM - # PFQBC enabled / DTCM & AHB wait-states disabled - mww 0x5C002034 0x0191 +proc str9x_config { } { + # -- Enable 96K RAM w/: + # PFQBC enabled / DTCM & AHB wait-states disabled + mww 0x5C002034 0x0191 + # PFQBC disabled / DTCM & AHB wait-states enabled + #mww 0x5C002034 0x0196 + + # 256K/32k + str9x flash_config 0 3 2 0 0x40000 + # 512K/32K + #str9x flash_config 0 4 2 0 0x80000 +} - str9x flash_config 0 4 2 0 0x80000 - flash protect 0 0 7 off +proc str9x_init { } { + # enable RTCK + jtag_rclk 0 + str9x_config } -$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x50000000 -work-area-size 16384 -work-area-backup 0 +$_TARGETNAME configure -event reset-init str9x_init + +$_TARGETNAME configure \ + -work-area-virt 0 \ + -work-area-phys 0x50000000 \ + -work-area-size 16384 \ + -work-area-backup 0 #flash bank str9x 0 0 -flash bank str9x 0x00000000 0x00080000 0 0 0 -flash bank str9x 0x00080000 0x00008000 0 0 0 +flash bank str9x 0x00000000 0x00040000 0 0 0 +flash bank str9x 0x00040000 0x00008000 0 0 0 -# For more information about the configuration files, take a look at: -# openocd.texi -- cgit v1.2.3