From 76b78feef1f0181bbcc388f21d185d0b4fa83cfb Mon Sep 17 00:00:00 2001
From: oharboe <oharboe@b42882b7-edfa-0310-969c-e2dbd0fdcd60>
Date: Fri, 4 Sep 2009 05:14:32 +0000
Subject: David Claffey <dnclaffey@gmail.com> get rid of reset recursion
git-svn-id: svn://svn.berlios.de/openocd/trunk@2664 b42882b7-edfa-0310-969c-e2dbd0fdcd60
---
tcl/target/ar71xx.cfg | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
(limited to 'tcl/target')
diff --git a/tcl/target/ar71xx.cfg b/tcl/target/ar71xx.cfg
index f2f5289b..213048ae 100644
--- a/tcl/target/ar71xx.cfg
+++ b/tcl/target/ar71xx.cfg
@@ -13,16 +13,17 @@ jtag newtap $CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id 1
set TARGETNAME [format "%s.cpu" $CHIPNAME]
target create $TARGETNAME mips_m4k -endian big -chain-position $TARGETNAME
-$TARGETNAME configure -event reset-init {
+$TARGETNAME configure -event reset-halt-post {
#setup PLL to lowest common denominator 300/300/150 setting
mww 0xb8050000 0x000f40a3 # reset val + CPU:3 DDR:3 AHB:0
mww 0xb8050000 0x800f40a3 # send to PLL
#next command will reset for PLL changes to take effect
mww 0xb8050008 3 # set reset_switch and clock_switch (resets SoC)
- reset halt # let openocd know that it is in the reset state
+}
- #initialize_pll
+$TARGETNAME configure -event reset-init {
+ #complete pll initialization
mww 0xb8050000 0x800f0080 # set sw_update bit
mww 0xb8050008 0 # clear reset_switch bit
mww 0xb8050000 0x800f00e8 # clr pwrdwn & bypass
--
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