From 8c2846ed450a6280aa3fa8b58e796f20405c842d Mon Sep 17 00:00:00 2001
From: Marek Vasut <marek.vasut@gmail.com>
Date: Sun, 29 Nov 2009 12:54:41 +0100
Subject: create target/pxa3xx.cfg

[dbrownell@users.sourceforge.net; remove pxa255 comment]

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
---
 tcl/target/pxa3xx.cfg | 86 +++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 86 insertions(+)
 create mode 100644 tcl/target/pxa3xx.cfg

(limited to 'tcl')

diff --git a/tcl/target/pxa3xx.cfg b/tcl/target/pxa3xx.cfg
new file mode 100644
index 00000000..5d649865
--- /dev/null
+++ b/tcl/target/pxa3xx.cfg
@@ -0,0 +1,86 @@
+# Marvell PXA3xx
+
+if { [info exists CHIPNAME] } {
+   set  _CHIPNAME $CHIPNAME
+} else {
+   set  _CHIPNAME pxa3xx
+}
+
+if { [info exists ENDIAN] } {
+   set  _ENDIAN $ENDIAN
+} else {
+   set  _ENDIAN little
+}
+
+# IDs for all currently known PXA3xx chips
+if { [info exists CPUTAPID_PXA30X_A0 ] } {
+   set _CPUTAPID_PXA30X_A0 $CPUTAPID_PXA30X_A0
+} else {
+   set _CPUTAPID_PXA30X_A0 0x0E648013
+}
+if { [info exists CPUTAPID_PXA30X_A1 ] } {
+   set _CPUTAPID_PXA30X_A1 $CPUTAPID_PXA30X_A1
+} else {
+   set _CPUTAPID_PXA30X_A1 0x1E648013
+}
+if { [info exists CPUTAPID_PXA31X_A0 ] } {
+   set _CPUTAPID_PXA31X_A0 $CPUTAPID_PXA31X_A0
+} else {
+   set _CPUTAPID_PXA31X_A0 0x0E649013
+}
+if { [info exists CPUTAPID_PXA31X_A1 ] } {
+   set _CPUTAPID_PXA31X_A1 $CPUTAPID_PXA31X_A1
+} else {
+   set _CPUTAPID_PXA31X_A1 0x1E649013
+}
+if { [info exists CPUTAPID_PXA31X_A2 ] } {
+   set _CPUTAPID_PXA31X_A2 $CPUTAPID_PXA31X_A2
+} else {
+   set _CPUTAPID_PXA31X_A2 0x2E649013
+}
+if { [info exists CPUTAPID_PXA31X_B0 ] } {
+   set _CPUTAPID_PXA31X_B0 $CPUTAPID_PXA31X_B0
+} else {
+   set _CPUTAPID_PXA31X_B0 0x3E649013
+}
+if { [info exists CPUTAPID_PXA32X_B1 ] } {
+   set _CPUTAPID_PXA32X_B1 $CPUTAPID_PXA32X_B1
+} else {
+   set _CPUTAPID_PXA32X_B1 0x5E642013
+}
+if { [info exists CPUTAPID_PXA32X_B2 ] } {
+   set _CPUTAPID_PXA32X_B2 $CPUTAPID_PXA32X_B2
+} else {
+   set _CPUTAPID_PXA32X_B2 0x6E642013
+}
+if { [info exists CPUTAPID_PXA32X_C0 ] } {
+   set _CPUTAPID_PXA32X_C0 $CPUTAPID_PXA32X_C0
+} else {
+   set _CPUTAPID_PXA32X_C0 0x7E642013
+}
+
+# set jtag_nsrst_delay to the delay introduced by your reset circuit
+# the rest of the needed delays are built into the openocd program
+jtag_nsrst_delay 260
+
+# set the jtag_ntrst_delay to the delay introduced by a reset circuit
+# the rest of the needed delays are built into the openocd program
+jtag_ntrst_delay 250
+
+set _TARGETNAME $_CHIPNAME.cpu
+jtag newtap $_CHIPNAME cpu -irlen 11 -ircapture 0x1 -irmask 0x7f \
+	-expected-id $_CPUTAPID_PXA30X_A0 \
+	-expected-id $_CPUTAPID_PXA30X_A1 \
+	-expected-id $_CPUTAPID_PXA31X_A0 \
+	-expected-id $_CPUTAPID_PXA31X_A1 \
+	-expected-id $_CPUTAPID_PXA31X_A2 \
+	-expected-id $_CPUTAPID_PXA31X_B0 \
+	-expected-id $_CPUTAPID_PXA32X_B1 \
+	-expected-id $_CPUTAPID_PXA32X_B2 \
+	-expected-id $_CPUTAPID_PXA32X_C0
+
+target create $_TARGETNAME xscale -endian $_ENDIAN \
+	-chain-position $_TARGETNAME -variant pxa3xx
+
+# work area in internal RAM.
+$_TARGETNAME configure -work-area-phys 0x5c030000 -work-area-size 0x10000
-- 
cgit v1.2.3