From 98d2579c61aea1cfc4c1e4bd391b9acf1b1ff5db Mon Sep 17 00:00:00 2001 From: Thomas Koeller Date: Tue, 10 Aug 2010 14:56:42 +0200 Subject: DM36x: Use enable bit for PLL pre-divider The PLL pre- and postdividers seem to have enable bits, although these are not mentioned in the chip documentation. Signed-off-by: Thomas Koeller --- tcl/target/davinci.cfg | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'tcl') diff --git a/tcl/target/davinci.cfg b/tcl/target/davinci.cfg index 6c6769fa..b736c6ef 100644 --- a/tcl/target/davinci.cfg +++ b/tcl/target/davinci.cfg @@ -179,7 +179,7 @@ proc pll_v03_setup {pll_addr mult config} { mww [expr $pll_addr + 0x0110] [expr ($mult / 2) & 0x1ff] if { [dict exists $config prediv] } { set div [dict get $config prediv] - set div [expr ($div - 1)] + set div [expr 0x8000 | ($div - 1)] mww [expr $pll_addr + 0x0114] $div } if { [dict exists $config postdiv] } { -- cgit v1.2.3