# Hitex stm32 performance stick if { [info exists CHIPNAME] } { set _CHIPNAME $CHIPNAME } else { set _CHIPNAME stm32_hitex } if { [info exists ENDIAN] } { set _ENDIAN $ENDIAN } else { set _ENDIAN little } # set jtag speed jtag_khz 500 jtag_nsrst_delay 100 jtag_ntrst_delay 100 #use combined on interfaces or targets that can't set TRST/SRST separately reset_config trst_and_srst #jtag scan chain # The CPU if { [info exists CPUTAPID ] } { set _CPUTAPID $CPUTAPID } else { # See STM Document RM0008 # Section 26.6.3 set _CPUTAPID 0x3ba00477 } jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID # The boundery scan register, leave the "expected-id" undefined. jtag newtap $_CHIPNAME bs -irlen 5 -ircapture 0x1 -irmask 0x1 # configure str750 connected to jtag chain jtag newtap $_CHIPNAME unknown -irlen 4 -ircapture 0x1 -irmask 0x0f set _TARGETNAME [format "%s.cpu" $_CHIPNAME] target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME $_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x20000000 -work-area-size 16384 -work-area-backup 0 # flash bank stm32x 0 0 0 0 0 # For more information about the configuration files, take a look at: # openocd.texi onchange='this.form.submit();'> Trygve Laugstøl

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