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| author | zwelch <zwelch@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2009-06-01 03:05:59 +0000 |
|---|---|---|
| committer | zwelch <zwelch@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2009-06-01 03:05:59 +0000 |
| commit | 878d0cb04370057bf04ee307625bffb2130227ce (patch) | |
| tree | 79fbb1ef56c564ab1f24d594366c59466daa8267 | |
| parent | b3d797699cafd6d3cf9693972f8e3e050a124fec (diff) | |
| download | openocd_libswd-878d0cb04370057bf04ee307625bffb2130227ce.tar.gz openocd_libswd-878d0cb04370057bf04ee307625bffb2130227ce.tar.bz2 openocd_libswd-878d0cb04370057bf04ee307625bffb2130227ce.tar.xz openocd_libswd-878d0cb04370057bf04ee307625bffb2130227ce.zip | |
David Brownell <david-b@pacbell.net>:
Split out OSK5912 board support from the omap5912 target config, and make
it pass sanity checks on my (Rev C/original) hardware:
- Fix syntax error ("-irlen" not "irlen")
- Provide real TAP ids for the ARM926ejs and the C55x dsp
- Label both CPUs appropriately (DSP, ARM)
- List both flash chips
The scan chain looks like this (note truncated DSP instruction code):
TapName | Enabled | IdCode Expected IrLen IrCap IrMask Instr
---|--------------------|---------|------------|------------|------|------|------|---------
0 | omap5912.dsp | Y | 0x03df1d81 | 0x03df1d81 | 0x26 | 0x00 | 0x00 | 0xffffffff
1 | omap5912.arm | Y | 0x0692602f | 0x0692602f | 0x04 | 0x01 | 0x00 | 0x0c
2 | omap5912.unknown | Y | 0x00000000 | 0x00000000 | 0x08 | 0x00 | 0x00 | 0xff
I still don't know what that third TAP is; maybe an early version of
an ICEpick JTAG router.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1974 b42882b7-edfa-0310-969c-e2dbd0fdcd60
| -rw-r--r-- | tcl/target/omap5912.cfg | 34 |
1 files changed, 14 insertions, 20 deletions
diff --git a/tcl/target/omap5912.cfg b/tcl/target/omap5912.cfg index 2942ad74..1a327929 100644 --- a/tcl/target/omap5912.cfg +++ b/tcl/target/omap5912.cfg @@ -1,5 +1,5 @@ -#TI OMAP5912 dual core processor - http://www.ti.com -#on a OMAP5912 OSK board http://www.spectrumdigital.com. +# TI OMAP5912 dual core processor +# http://focus.ti.com/docs/prod/folders/print/omap5912.html if { [info exists CHIPNAME] } { set _CHIPNAME $CHIPNAME @@ -17,22 +17,22 @@ if { [info exists ENDIAN] } { if { [info exists CPUTAPID ] } { set _CPUTAPID $CPUTAPID } else { - # force an error till we get a good number - set _CPUTAPID 0xffffffff + # NOTE: validated with XOMAP5912 part + set _CPUTAPID 0x0692602f } -#use combined on interfaces or targets that can't set TRST/SRST separately -reset_config trst_and_srst +# NOTE: presumes irlen 38 is the C55x DSP, matching BSDL for +# its standalone siblings (like TMS320VC5502) of the same era #jtag scan chain -jtag newtap $_CHIPNAME unknown1 -irlen 38 -ircapture 0x0 -irmask 0x0 -jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0x0 -expected-id $_CPUTAPID -jtag newtap $_CHIPNAME unknown2 irlen 8 -ircapture 0x0 -irmask 0x0 +jtag newtap $_CHIPNAME dsp -irlen 38 -ircapture 0x0 -irmask 0x0 -expected-id 0x03df1d81 +jtag newtap $_CHIPNAME arm -irlen 4 -ircapture 0x1 -irmask 0x0 -expected-id $_CPUTAPID +jtag newtap $_CHIPNAME unknown -irlen 8 -ircapture 0x0 -irmask 0x0 -set _TARGETNAME [format "%s.cpu" $_CHIPNAME] -target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs +set _TARGETNAME $_CHIPNAME.arm +target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -$_TARGETNAME configure -event reset-init { +proc omap5912_reset {} { # # halt target # @@ -50,14 +50,8 @@ $_TARGETNAME configure -event reset-init { sleep 500 mww 0xfffeb048 0x00005555 sleep 500 - # - # detect flash - # - flash probe 0 } # omap5912 lcd frame buffer as working area -$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x20000000 -work-area-size 0x3e800 -work-area-backup 0 - -#flash bank <driver> <base> <size> <chip_width> <bus_width> -flash bank cfi 0x00000000 0x1000000 2 2 0 +$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x20000000 \ + -work-area-size 0x3e800 -work-area-backup 0 |