nit: more LOG_* \n fixes

Remove extra \n from LOG_DEBUG, LOG_INFO, and LOG_WARNING messages

Remove LOG_INFO_N
LOG_INFO_N was only used once and had a \n at the end

Change LOG_USER_N calls that end with \n to LOG_USER

5 files changed, 38 insertions, 38 deletions

diff --git a/src/flash/nand/at91sam9.c b/src/flash/nand/at91sam9.c
index d118f6c9..3ca9c39f 100644
--- a/src/flash/nand/at91sam9.c
+++ b/src/flash/nand/at91sam9.c
@@ -513,7 +513,7 @@ NAND_DEVICE_COMMAND_HANDLER(at91sam9_nand_device_command)
 	unsigned long chip = 0, ecc = 0;
 	struct at91sam9_nand *info = NULL;
 
-	LOG_DEBUG("AT91SAM9 NAND Device Command\n");
+	LOG_DEBUG("AT91SAM9 NAND Device Command");
 
 	if (CMD_ARGC < 3 || CMD_ARGC > 4) {
 		LOG_ERROR("parameters: %s target chip_addr", CMD_ARGV[0]);
diff --git a/src/flash/nand/s3c2440.c b/src/flash/nand/s3c2440.c
index 4221f3d7..072683ab 100644
--- a/src/flash/nand/s3c2440.c
+++ b/src/flash/nand/s3c2440.c
@@ -93,7 +93,7 @@ int s3c2440_read_block_data(struct nand_device *nand, uint8_t *data, int data_si
 	uint32_t nfdata = s3c24xx_info->data;
 	uint32_t tmp;
 
-	LOG_INFO("%s: reading data: %p, %p, %d\n", __func__, nand, data, data_size);
+	LOG_INFO("%s: reading data: %p, %p, %d", __func__, nand, data, data_size);
 
 	if (target->state != TARGET_HALTED) {
 		LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
diff --git a/src/flash/nor/aduc702x.c b/src/flash/nor/aduc702x.c
index 2005b78f..02270aef 100644
--- a/src/flash/nor/aduc702x.c
+++ b/src/flash/nor/aduc702x.c
@@ -105,7 +105,7 @@ static int aduc702x_erase(struct flash_bank *bank, int first, int last)
 
 	/* mass erase */
 	if (((first | last) == 0) || ((first == 0) && (last >= bank->num_sectors))) {
-		LOG_DEBUG("performing mass erase.\n");
+		LOG_DEBUG("performing mass erase.");
 		target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEDAT, 0x3cff);
 		target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEADR, 0xffc3);
 		target_write_u8(target, ADUC702x_FLASH + ADUC702x_FLASH_FEECON, 0x06);
@@ -117,7 +117,7 @@ static int aduc702x_erase(struct flash_bank *bank, int first, int last)
 			return ERROR_FLASH_OPERATION_FAILED;
 		}
 
-		LOG_DEBUG("mass erase successful.\n");
+		LOG_DEBUG("mass erase successful.");
 		return ERROR_OK;
 	} else {
                 unsigned long adr;
@@ -137,7 +137,7 @@ static int aduc702x_erase(struct flash_bank *bank, int first, int last)
                                 return ERROR_FLASH_SECTOR_NOT_ERASED;
                         }
 
-                        LOG_DEBUG("erased sector at address 0x%08lX\n", adr);
+                        LOG_DEBUG("erased sector at address 0x%08lX", adr);
                 }
         }
 
@@ -336,7 +336,7 @@ static int aduc702x_write_single(struct flash_bank *bank, uint8_t *buffer, uint3
 		}
 
 	}
-        LOG_DEBUG("wrote %d bytes at address 0x%08lX\n", (int)count, (unsigned long)(offset + x));
+        LOG_DEBUG("wrote %d bytes at address 0x%08lX", (int)count, (unsigned long)(offset + x));
 
         aduc702x_set_write_enable(target, 0);
 
diff --git a/src/flash/nor/at91sam3.c b/src/flash/nor/at91sam3.c
index 94b37243..0915ba70 100644
--- a/src/flash/nor/at91sam3.c
+++ b/src/flash/nor/at91sam3.c
@@ -1459,16 +1459,16 @@ sam3_explain_ckgr_mor(struct sam3_chip *pChip)
 	uint32_t rcen;
 
 	v = sam3_reg_fieldname(pChip, "MOSCXTEN", pChip->cfg.CKGR_MOR, 0, 1);
-	LOG_USER_N("(main xtal enabled: %s)\n",
+	LOG_USER("(main xtal enabled: %s)",
 				  _yes_or_no(v));
 	v = sam3_reg_fieldname(pChip, "MOSCXTBY", pChip->cfg.CKGR_MOR, 1, 1);
-	LOG_USER_N("(main osc bypass: %s)\n",
+	LOG_USER("(main osc bypass: %s)",
 				  _yes_or_no(v));
 	rcen = sam3_reg_fieldname(pChip, "MOSCRCEN", pChip->cfg.CKGR_MOR, 2, 1);
-	LOG_USER_N("(onchip RC-OSC enabled: %s)\n",
+	LOG_USER("(onchip RC-OSC enabled: %s)",
 				  _yes_or_no(rcen));
 	v = sam3_reg_fieldname(pChip, "MOSCRCF", pChip->cfg.CKGR_MOR, 4, 3);
-	LOG_USER_N("(onchip RC-OSC freq: %s)\n",
+	LOG_USER("(onchip RC-OSC freq: %s)",
 				  _rc_freq[v]);
 
 	pChip->cfg.rc_freq = 0;
@@ -1489,14 +1489,14 @@ sam3_explain_ckgr_mor(struct sam3_chip *pChip)
 	}
 
 	v = sam3_reg_fieldname(pChip,"MOSCXTST", pChip->cfg.CKGR_MOR, 8, 8);
-	LOG_USER_N("(startup clks, time= %f uSecs)\n",
+	LOG_USER("(startup clks, time= %f uSecs)",
 				  ((float)(v * 1000000)) / ((float)(pChip->cfg.slow_freq)));
 	v = sam3_reg_fieldname(pChip, "MOSCSEL", pChip->cfg.CKGR_MOR, 24, 1);
-	LOG_USER_N("(mainosc source: %s)\n",
+	LOG_USER("(mainosc source: %s)",
 				  v ? "external xtal" : "internal RC");
 
 	v = sam3_reg_fieldname(pChip,"CFDEN", pChip->cfg.CKGR_MOR, 25, 1);
-	LOG_USER_N("(clock failure enabled: %s)\n",
+	LOG_USER("(clock failure enabled: %s)",
 				 _yes_or_no(v));
 }
 
@@ -1513,16 +1513,16 @@ sam3_explain_chipid_cidr(struct sam3_chip *pChip)
 	LOG_USER_N("\n");
 
 	v = sam3_reg_fieldname(pChip, "EPROC", pChip->cfg.CHIPID_CIDR, 5, 3);
-	LOG_USER_N("%s\n", eproc_names[v]);
+	LOG_USER("%s", eproc_names[v]);
 
 	v = sam3_reg_fieldname(pChip, "NVPSIZE", pChip->cfg.CHIPID_CIDR, 8, 4);
-	LOG_USER_N("%s\n", nvpsize[v]);
+	LOG_USER("%s", nvpsize[v]);
 
 	v = sam3_reg_fieldname(pChip, "NVPSIZE2", pChip->cfg.CHIPID_CIDR, 12, 4);
-	LOG_USER_N("%s\n", nvpsize2[v]);
+	LOG_USER("%s", nvpsize2[v]);
 
 	v = sam3_reg_fieldname(pChip, "SRAMSIZE", pChip->cfg.CHIPID_CIDR, 16,4);
-	LOG_USER_N("%s\n", sramsize[ v ]);
+	LOG_USER("%s", sramsize[ v ]);
 
 	v = sam3_reg_fieldname(pChip, "ARCH", pChip->cfg.CHIPID_CIDR, 20, 8);
 	cp = _unknown;
@@ -1533,13 +1533,13 @@ sam3_explain_chipid_cidr(struct sam3_chip *pChip)
 		}
 	}
 
-	LOG_USER_N("%s\n", cp);
+	LOG_USER("%s", cp);
 
 	v = sam3_reg_fieldname(pChip, "NVPTYP", pChip->cfg.CHIPID_CIDR, 28, 3);
-	LOG_USER_N("%s\n", nvptype[ v ]);
+	LOG_USER("%s", nvptype[ v ]);
 
 	v = sam3_reg_fieldname(pChip, "EXTID", pChip->cfg.CHIPID_CIDR, 31, 1);
-	LOG_USER_N("(exists: %s)\n", _yes_or_no(v));
+	LOG_USER("(exists: %s)", _yes_or_no(v));
 }
 
 static void
@@ -1549,14 +1549,14 @@ sam3_explain_ckgr_mcfr(struct sam3_chip *pChip)
 
 
 	v = sam3_reg_fieldname(pChip, "MAINFRDY", pChip->cfg.CKGR_MCFR, 16, 1);
-	LOG_USER_N("(main ready: %s)\n", _yes_or_no(v));
+	LOG_USER("(main ready: %s)", _yes_or_no(v));
 
 	v = sam3_reg_fieldname(pChip, "MAINF", pChip->cfg.CKGR_MCFR, 0, 16);
 
 	v = (v * pChip->cfg.slow_freq) / 16;
 	pChip->cfg.mainosc_freq = v;
 
-	LOG_USER_N("(%3.03f Mhz (%d.%03dkhz slowclk)\n",
+	LOG_USER("(%3.03f Mhz (%d.%03dkhz slowclk)",
 				 _tomhz(v),
 				 pChip->cfg.slow_freq / 1000,
 				 pChip->cfg.slow_freq % 1000);
@@ -1574,12 +1574,12 @@ sam3_explain_ckgr_plla(struct sam3_chip *pChip)
 	LOG_USER_N("\n");
 	pChip->cfg.plla_freq = 0;
 	if (mula == 0) {
-		LOG_USER_N("\tPLLA Freq: (Disabled,mula = 0)\n");
+		LOG_USER("\tPLLA Freq: (Disabled,mula = 0)");
 	} else if (diva == 0) {
-		LOG_USER_N("\tPLLA Freq: (Disabled,diva = 0)\n");
+		LOG_USER("\tPLLA Freq: (Disabled,diva = 0)");
 	} else if (diva == 1) {
 		pChip->cfg.plla_freq = (pChip->cfg.mainosc_freq * (mula + 1));
-		LOG_USER_N("\tPLLA Freq: %3.03f MHz\n",
+		LOG_USER("\tPLLA Freq: %3.03f MHz",
 					 _tomhz(pChip->cfg.plla_freq));
 	}
 }
@@ -1620,7 +1620,7 @@ sam3_explain_mckr(struct sam3_chip *pChip)
 		break;
 	}
 
-	LOG_USER_N("%s (%3.03f Mhz)\n",
+	LOG_USER("%s (%3.03f Mhz)",
 				  cp,
 				  _tomhz(fin));
 	pres = sam3_reg_fieldname(pChip, "PRES", pChip->cfg.PMC_MCKR, 4, 3);
@@ -1660,14 +1660,14 @@ sam3_explain_mckr(struct sam3_chip *pChip)
 		assert(0);
 		break;
 	}
-	LOG_USER_N("(%s)\n", cp);
+	LOG_USER("(%s)", cp);
 	fin = fin / pdiv;
 	// sam3 has a *SINGLE* clock -
 	// other at91 series parts have divisors for these.
 	pChip->cfg.cpu_freq = fin;
 	pChip->cfg.mclk_freq = fin;
 	pChip->cfg.fclk_freq = fin;
-	LOG_USER_N("\t\tResult CPU Freq: %3.03f\n",
+	LOG_USER("\t\tResult CPU Freq: %3.03f",
 				  _tomhz(fin));
 }
 
@@ -1829,7 +1829,7 @@ sam3_GetInfo(struct sam3_chip *pChip)
 		// display all regs
 		LOG_DEBUG("Start: %s", pReg->name);
 		regval = *sam3_get_reg_ptr(&(pChip->cfg), pReg);
-		LOG_USER_N("%*s: [0x%08x] -> 0x%08x\n",
+		LOG_USER("%*s: [0x%08x] -> 0x%08x",
 					 REG_NAME_WIDTH,
 					 pReg->name,
 					 pReg->address,
@@ -1840,14 +1840,14 @@ sam3_GetInfo(struct sam3_chip *pChip)
 		LOG_DEBUG("End: %s", pReg->name);
 		pReg++;
 	}
-	LOG_USER_N("   rc-osc: %3.03f MHz\n", _tomhz(pChip->cfg.rc_freq));
-	LOG_USER_N("  mainosc: %3.03f MHz\n", _tomhz(pChip->cfg.mainosc_freq));
-	LOG_USER_N("     plla: %3.03f MHz\n", _tomhz(pChip->cfg.plla_freq));
-	LOG_USER_N(" cpu-freq: %3.03f MHz\n", _tomhz(pChip->cfg.cpu_freq));
-	LOG_USER_N("mclk-freq: %3.03f MHz\n", _tomhz(pChip->cfg.mclk_freq));
+	LOG_USER("   rc-osc: %3.03f MHz", _tomhz(pChip->cfg.rc_freq));
+	LOG_USER("  mainosc: %3.03f MHz", _tomhz(pChip->cfg.mainosc_freq));
+	LOG_USER("     plla: %3.03f MHz", _tomhz(pChip->cfg.plla_freq));
+	LOG_USER(" cpu-freq: %3.03f MHz", _tomhz(pChip->cfg.cpu_freq));
+	LOG_USER("mclk-freq: %3.03f MHz", _tomhz(pChip->cfg.mclk_freq));
 
 
-	LOG_USER_N(" UniqueId: 0x%08x 0x%08x 0x%08x 0x%08x\n",
+	LOG_USER(" UniqueId: 0x%08x 0x%08x 0x%08x 0x%08x",
 				  pChip->cfg.unique_id[0],
 				  pChip->cfg.unique_id[1],
 				  pChip->cfg.unique_id[2],
@@ -2007,7 +2007,7 @@ sam3_GetDetails(struct sam3_bank_private *pPrivate)
 		LOG_ERROR("SAM3 ChipID 0x%08x not found in table (perhaps you can this chip?)",
 				  (unsigned int)(pPrivate->pChip->cfg.CHIPID_CIDR));
 		// Help the victim, print details about the chip
-		LOG_INFO_N("SAM3 CHIPID_CIDR: 0x%08x decodes as follows\n",
+		LOG_INFO("SAM3 CHIPID_CIDR: 0x%08x decodes as follows",
 						pPrivate->pChip->cfg.CHIPID_CIDR);
 		sam3_explain_chipid_cidr(pPrivate->pChip);
 		return ERROR_FAIL;
@@ -2588,7 +2588,7 @@ COMMAND_HANDLER(sam3_handle_info_command)
 
 	r = sam3_GetInfo(pChip);
 	if (r != ERROR_OK) {
-		LOG_DEBUG("Sam3Info, Failed %d\n",r);
+		LOG_DEBUG("Sam3Info, Failed %d",r);
 		return r;
 	}
 
diff --git a/src/flash/nor/at91sam7.c b/src/flash/nor/at91sam7.c
index ad6ee6c3..ce4f8a91 100644
--- a/src/flash/nor/at91sam7.c
+++ b/src/flash/nor/at91sam7.c
@@ -1261,7 +1261,7 @@ COMMAND_HANDLER(at91sam7_handle_gpnvm_command)
 
 	/* GPNVM and SECURITY bits apply only for MC_FSR of EFC0 */
 	status = at91sam7_get_flash_status(bank->target, 0);
-	LOG_DEBUG("at91sam7_handle_gpnvm_command: cmd 0x%x, value %d, status 0x%" PRIx32 " \n", flashcmd, bit, status);
+	LOG_DEBUG("at91sam7_handle_gpnvm_command: cmd 0x%x, value %d, status 0x%" PRIx32, flashcmd, bit, status);
 
 	/* check protect state */
 	at91sam7_protect_check(bank);