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authorDavid Brownell <dbrownell@users.sourceforge.net>2010-03-15 08:37:43 -0700
committerDavid Brownell <dbrownell@users.sourceforge.net>2010-03-15 08:37:43 -0700
commit96f9790279f74f39b35fc3ad09340fd03123180c (patch)
tree672f5b717c5f6edf3f7e1377341e37cd7f6497ee /tcl/board/at91sam9g20-ek.cfg
parent4b964a81ca1423b808a056b457e3d458689d50fa (diff)
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rename jtag_khz as adapter_khz
Globally rename "jtag_khz" as "adapter_khz", and move it out of the "jtag" command group ... it needs to be used with non-JTAG transports Includes a migration aid (in jtag/startup.tcl) so that old user scripts won't break. That aid should Sunset in about a year. (We may want to update it to include a nag message too.) Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Diffstat (limited to 'tcl/board/at91sam9g20-ek.cfg')
-rw-r--r--tcl/board/at91sam9g20-ek.cfg4
1 files changed, 2 insertions, 2 deletions
diff --git a/tcl/board/at91sam9g20-ek.cfg b/tcl/board/at91sam9g20-ek.cfg
index fb6068cc..f24f1a13 100644
--- a/tcl/board/at91sam9g20-ek.cfg
+++ b/tcl/board/at91sam9g20-ek.cfg
@@ -77,7 +77,7 @@ proc at91sam9g20_init { } {
# means the master clock (MCLK) must be at or below 133 MHz or timing errors will occur. The processor
# core can operate up to 400 MHz and therefore PCLK must be at or below this to function properly.
- jtag_khz 2 # Slow-speed oscillator enabled at reset, so run jtag speed slow.
+ adapter_khz 2 # Slow-speed oscillator enabled at reset, so run jtag speed slow.
halt # Make sure processor is halted, or error will result in following steps.
mww 0xfffffd08 0xa5000501 # RSTC_MR : enable user reset.
mww 0xfffffd44 0x00008000 # WDT_MR : disable watchdog.
@@ -112,7 +112,7 @@ proc at91sam9g20_init { } {
# Switch over to adaptive clocking.
- jtag_khz 0
+ adapter_khz 0
# Enable faster DCC downloads.