diff options
| -rw-r--r-- | doc/openocd.texi | 24 | ||||
| -rw-r--r-- | src/target/arm11.c | 29 |
2 files changed, 30 insertions, 23 deletions
diff --git a/doc/openocd.texi b/doc/openocd.texi index b91e7540..a6fb9707 100644 --- a/doc/openocd.texi +++ b/doc/openocd.texi @@ -6162,27 +6162,29 @@ Without arguments, the current settings are displayed. @subsection ARM11 specific commands @cindex ARM11 -@deffn Command {arm11 memwrite burst} [value] +@deffn Command {arm11 memwrite burst} [@option{enable}|@option{disable}] Displays the value of the memwrite burst-enable flag, -which is enabled by default. Burst writes are only used -for memory writes larger than 1 word. Single word writes -are likely to be from reset init scripts and those writes -are often to non-memory locations which could easily have -many wait states, which could easily break burst writes. -If @var{value} is defined, first assigns that. +which is enabled by default. +If a boolean parameter is provided, first assigns that flag. +Burst writes are only used for memory writes larger than 1 word. +They improve performance by assuming that the CPU has read each data +word over JTAG and completed its write before the next word arrives, +instead of polling for a status flag to verify that completion. +This is usually safe, because JTAG runs much slower than the CPU. @end deffn -@deffn Command {arm11 memwrite error_fatal} [value] +@deffn Command {arm11 memwrite error_fatal} [@option{enable}|@option{disable}] Displays the value of the memwrite error_fatal flag, which is enabled by default. -If @var{value} is defined, first assigns that. +If a boolean parameter is provided, first assigns that flag. +When set, certain memory write errors cause earlier transfer termination. @end deffn -@deffn Command {arm11 step_irq_enable} [value] +@deffn Command {arm11 step_irq_enable} [@option{enable}|@option{disable}] Displays the value of the flag controlling whether IRQs are enabled during single stepping; they are disabled by default. -If @var{value} is defined, first assigns that. +If a boolean parameter is provided, first assigns that. @end deffn @deffn Command {arm11 vcr} [value] diff --git a/src/target/arm11.c b/src/target/arm11.c index 67a84095..082930a9 100644 --- a/src/target/arm11.c +++ b/src/target/arm11.c @@ -1318,17 +1318,20 @@ COMMAND_HANDLER(arm11_handle_vcr) static const struct command_registration arm11_mw_command_handlers[] = { { .name = "burst", - .handler = &arm11_handle_bool_memwrite_burst, + .handler = arm11_handle_bool_memwrite_burst, .mode = COMMAND_ANY, - .help = "Enable/Disable potentially risky fast burst mode" - " (default: enabled)", + .help = "Display or modify flag controlling potentially " + "risky fast burst mode (default: enabled)", + .usage = "['enable'|'disable']", }, { .name = "error_fatal", - .handler = &arm11_handle_bool_memwrite_error_fatal, + .handler = arm11_handle_bool_memwrite_error_fatal, .mode = COMMAND_ANY, - .help = "Terminate program if transfer error was found" + .help = "Display or modify flag controlling transfer " + "termination on transfer errors" " (default: enabled)", + .usage = "['enable'|'disable']", }, COMMAND_REGISTRATION_DONE }; @@ -1338,11 +1341,11 @@ static const struct command_registration arm11_any_command_handlers[] = { * simulate + breakpoint implementation is broken. * TEMPORARY! NOT DOCUMENTED! */ .name = "hardware_step", - .handler = &arm11_handle_bool_hardware_step, + .handler = arm11_handle_bool_hardware_step, .mode = COMMAND_ANY, .help = "DEBUG ONLY - Hardware single stepping" " (default: disabled)", - .usage = "(enable|disable)", + .usage = "['enable'|'disable']", }, { .name = "memwrite", @@ -1352,16 +1355,18 @@ static const struct command_registration arm11_any_command_handlers[] = { }, { .name = "step_irq_enable", - .handler = &arm11_handle_bool_step_irq_enable, + .handler = arm11_handle_bool_step_irq_enable, .mode = COMMAND_ANY, - .help = "Enable interrupts while stepping" - " (default: disabled)", + .help = "Display or modify flag controlling interrupt " + "enable while stepping (default: disabled)", + .usage = "['enable'|'disable']", }, { .name = "vcr", - .handler = &arm11_handle_vcr, + .handler = arm11_handle_vcr, .mode = COMMAND_ANY, - .help = "Control (Interrupt) Vector Catch Register", + .help = "Display or modify Vector Catch Register", + .usage = "[value]", }, COMMAND_REGISTRATION_DONE }; |