diff options
Diffstat (limited to 'src/flash/ocl/at91sam7x')
| -rw-r--r-- | src/flash/ocl/at91sam7x/at91sam7x_ocl_flash.script | 8 | ||||
| -rw-r--r-- | src/flash/ocl/at91sam7x/at91sam7x_ram.ld | 264 | ||||
| -rw-r--r-- | src/flash/ocl/at91sam7x/crt.s | 448 | ||||
| -rw-r--r-- | src/flash/ocl/at91sam7x/dcc.c | 102 | ||||
| -rw-r--r-- | src/flash/ocl/at91sam7x/dcc.h | 62 | ||||
| -rw-r--r-- | src/flash/ocl/at91sam7x/main.c | 214 | ||||
| -rw-r--r-- | src/flash/ocl/at91sam7x/makefile | 258 | ||||
| -rw-r--r-- | src/flash/ocl/at91sam7x/ocl.h | 80 | ||||
| -rw-r--r-- | src/flash/ocl/at91sam7x/platform.h | 92 | ||||
| -rw-r--r-- | src/flash/ocl/at91sam7x/samflash.c | 392 | ||||
| -rw-r--r-- | src/flash/ocl/at91sam7x/samflash.h | 96 | ||||
| -rw-r--r-- | src/flash/ocl/at91sam7x/samregs.h | 166 |
12 files changed, 1090 insertions, 1092 deletions
diff --git a/src/flash/ocl/at91sam7x/at91sam7x_ocl_flash.script b/src/flash/ocl/at91sam7x/at91sam7x_ocl_flash.script index dbc40a0c..85450c14 100644 --- a/src/flash/ocl/at91sam7x/at91sam7x_ocl_flash.script +++ b/src/flash/ocl/at91sam7x/at91sam7x_ocl_flash.script @@ -1,4 +1,4 @@ -soft_reset_halt
-load_image at91sam7x_ocl.bin 0x200000
-resume 0x200000
-flash probe 0
+soft_reset_halt +load_image at91sam7x_ocl.bin 0x200000 +resume 0x200000 +flash probe 0 diff --git a/src/flash/ocl/at91sam7x/at91sam7x_ram.ld b/src/flash/ocl/at91sam7x/at91sam7x_ram.ld index 106d2180..24c5c2b5 100644 --- a/src/flash/ocl/at91sam7x/at91sam7x_ram.ld +++ b/src/flash/ocl/at91sam7x/at91sam7x_ram.ld @@ -1,132 +1,132 @@ -/****************************************************************************
-* Copyright (c) 2006 by Michael Fischer. All rights reserved.
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-*
-* 1. Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-* 2. Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in the
-* documentation and/or other materials provided with the distribution.
-* 3. Neither the name of the author nor the names of its contributors may
-* be used to endorse or promote products derived from this software
-* without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
-* THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
-* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
-* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
-* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
-* SUCH DAMAGE.
-*
-****************************************************************************
-*
-* History:
-*
-* 30.03.06 mifi First Version
-****************************************************************************/
-
-
-ENTRY(ResetHandler)
-SEARCH_DIR(.)
-
-/*
- * Define stack size here
- */
-FIQ_STACK_SIZE = 0x0100;
-IRQ_STACK_SIZE = 0x0100;
-ABT_STACK_SIZE = 0x0100;
-UND_STACK_SIZE = 0x0100;
-SVC_STACK_SIZE = 0x0100;
-
-
-MEMORY
-{
- ram : org = 0x00200000, len = 64k
-}
-
-/*
- * Do not change the next code
- */
-SECTIONS
-{
- .text :
- {
- *(.vectors);
- . = ALIGN(4);
- *(.init);
- . = ALIGN(4);
- *(.text);
- . = ALIGN(4);
- *(.rodata);
- . = ALIGN(4);
- *(.rodata*);
- . = ALIGN(4);
- *(.glue_7t);
- . = ALIGN(4);
- *(.glue_7);
- . = ALIGN(4);
- etext = .;
- } > ram
-
- .data :
- {
- PROVIDE (__data_start = .);
- *(.data)
- . = ALIGN(4);
- edata = .;
- _edata = .;
- PROVIDE (__data_end = .);
- } > ram
-
- .bss :
- {
- PROVIDE (__bss_start = .);
- *(.bss)
- *(COMMON)
- . = ALIGN(4);
- PROVIDE (__bss_end = .);
-
- . = ALIGN(256);
-
- PROVIDE (__stack_start = .);
-
- PROVIDE (__stack_fiq_start = .);
- . += FIQ_STACK_SIZE;
- . = ALIGN(4);
- PROVIDE (__stack_fiq_end = .);
-
- PROVIDE (__stack_irq_start = .);
- . += IRQ_STACK_SIZE;
- . = ALIGN(4);
- PROVIDE (__stack_irq_end = .);
-
- PROVIDE (__stack_abt_start = .);
- . += ABT_STACK_SIZE;
- . = ALIGN(4);
- PROVIDE (__stack_abt_end = .);
-
- PROVIDE (__stack_und_start = .);
- . += UND_STACK_SIZE;
- . = ALIGN(4);
- PROVIDE (__stack_und_end = .);
-
- PROVIDE (__stack_svc_start = .);
- . += SVC_STACK_SIZE;
- . = ALIGN(4);
- PROVIDE (__stack_svc_end = .);
- PROVIDE (__stack_end = .);
- PROVIDE (__heap_start = .);
- } > ram
-
-}
-/*** EOF ***/
-
+/**************************************************************************** +* Copyright (c) 2006 by Michael Fischer. All rights reserved. +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* 1. Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* 2. Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the distribution. +* 3. Neither the name of the author nor the names of its contributors may +* be used to endorse or promote products derived from this software +* without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL +* THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF +* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF +* SUCH DAMAGE. +* +**************************************************************************** +* +* History: +* +* 30.03.06 mifi First Version +****************************************************************************/ + + +ENTRY(ResetHandler) +SEARCH_DIR(.) + +/* + * Define stack size here + */ +FIQ_STACK_SIZE = 0x0100; +IRQ_STACK_SIZE = 0x0100; +ABT_STACK_SIZE = 0x0100; +UND_STACK_SIZE = 0x0100; +SVC_STACK_SIZE = 0x0100; + + +MEMORY +{ + ram : org = 0x00200000, len = 64k +} + +/* + * Do not change the next code + */ +SECTIONS +{ + .text : + { + *(.vectors); + . = ALIGN(4); + *(.init); + . = ALIGN(4); + *(.text); + . = ALIGN(4); + *(.rodata); + . = ALIGN(4); + *(.rodata*); + . = ALIGN(4); + *(.glue_7t); + . = ALIGN(4); + *(.glue_7); + . = ALIGN(4); + etext = .; + } > ram + + .data : + { + PROVIDE (__data_start = .); + *(.data) + . = ALIGN(4); + edata = .; + _edata = .; + PROVIDE (__data_end = .); + } > ram + + .bss : + { + PROVIDE (__bss_start = .); + *(.bss) + *(COMMON) + . = ALIGN(4); + PROVIDE (__bss_end = .); + + . = ALIGN(256); + + PROVIDE (__stack_start = .); + + PROVIDE (__stack_fiq_start = .); + . += FIQ_STACK_SIZE; + . = ALIGN(4); + PROVIDE (__stack_fiq_end = .); + + PROVIDE (__stack_irq_start = .); + . += IRQ_STACK_SIZE; + . = ALIGN(4); + PROVIDE (__stack_irq_end = .); + + PROVIDE (__stack_abt_start = .); + . += ABT_STACK_SIZE; + . = ALIGN(4); + PROVIDE (__stack_abt_end = .); + + PROVIDE (__stack_und_start = .); + . += UND_STACK_SIZE; + . = ALIGN(4); + PROVIDE (__stack_und_end = .); + + PROVIDE (__stack_svc_start = .); + . += SVC_STACK_SIZE; + . = ALIGN(4); + PROVIDE (__stack_svc_end = .); + PROVIDE (__stack_end = .); + PROVIDE (__heap_start = .); + } > ram + +} +/*** EOF ***/ + diff --git a/src/flash/ocl/at91sam7x/crt.s b/src/flash/ocl/at91sam7x/crt.s index 9ea8a7fc..b0bae0d6 100644 --- a/src/flash/ocl/at91sam7x/crt.s +++ b/src/flash/ocl/at91sam7x/crt.s @@ -1,225 +1,223 @@ -/****************************************************************************
-* Copyright (c) 2006 by Michael Fischer. All rights reserved.
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-*
-* 1. Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-* 2. Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in the
-* documentation and/or other materials provided with the distribution.
-* 3. Neither the name of the author nor the names of its contributors may
-* be used to endorse or promote products derived from this software
-* without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
-* THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
-* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
-* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
-* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
-* SUCH DAMAGE.
-*
-****************************************************************************
-*
-* History:
-*
-* 18.12.06 mifi First Version
-* The hardware initialization is based on the startup file
-* crtat91sam7x256_rom.S from NutOS 4.2.1.
-* Therefore partial copyright by egnite Software GmbH.
-****************************************************************************/
-
-/*
- * Some defines for the program status registers
- */
- ARM_MODE_USER = 0x10 /* Normal User Mode */
- ARM_MODE_FIQ = 0x11 /* FIQ Fast Interrupts Mode */
- ARM_MODE_IRQ = 0x12 /* IRQ Standard Interrupts Mode */
- ARM_MODE_SVC = 0x13 /* Supervisor Interrupts Mode */
- ARM_MODE_ABORT = 0x17 /* Abort Processing memory Faults Mode */
- ARM_MODE_UNDEF = 0x1B /* Undefined Instructions Mode */
- ARM_MODE_SYS = 0x1F /* System Running in Priviledged Operating Mode */
- ARM_MODE_MASK = 0x1F
-
- I_BIT = 0x80 /* disable IRQ when I bit is set */
- F_BIT = 0x40 /* disable IRQ when I bit is set */
-
-/*
- * Register Base Address
- */
- AIC_BASE = 0xFFFFF000
- AIC_EOICR_OFF = 0x130
- AIC_IDCR_OFF = 0x124
-
- RSTC_MR = 0xFFFFFD08
- RSTC_KEY = 0xA5000000
- RSTC_URSTEN = 0x00000001
-
- WDT_BASE = 0xFFFFFD40
- WDT_MR_OFF = 0x00000004
- WDT_WDDIS = 0x00008000
-
- MC_BASE = 0xFFFFFF00
- MC_FMR_OFF = 0x00000060
- MC_FWS_1FWS = 0x00480100
-
- .section .vectors,"ax"
- .code 32
-
-/****************************************************************************/
-/* Vector table and reset entry */
-/****************************************************************************/
-_vectors:
- ldr pc, ResetAddr /* Reset */
- ldr pc, UndefAddr /* Undefined instruction */
- ldr pc, SWIAddr /* Software interrupt */
- ldr pc, PAbortAddr /* Prefetch abort */
- ldr pc, DAbortAddr /* Data abort */
- ldr pc, ReservedAddr /* Reserved */
- ldr pc, IRQAddr /* IRQ interrupt */
- ldr pc, FIQAddr /* FIQ interrupt */
-
-
-ResetAddr: .word ResetHandler
-UndefAddr: .word UndefHandler
-SWIAddr: .word SWIHandler
-PAbortAddr: .word PAbortHandler
-DAbortAddr: .word DAbortHandler
-ReservedAddr: .word 0
-IRQAddr: .word IRQHandler
-FIQAddr: .word FIQHandler
-
- .ltorg
-
- .section .init, "ax"
- .code 32
-
- .global ResetHandler
- .global ExitFunction
- .extern main
-/****************************************************************************/
-/* Reset handler */
-/****************************************************************************/
-ResetHandler:
- /*
- * The watchdog is enabled after processor reset. Disable it.
- */
- ldr r1, =WDT_BASE
- ldr r0, =WDT_WDDIS
- str r0, [r1, #WDT_MR_OFF]
-
-
- /*
- * Enable user reset: assertion length programmed to 1ms
- */
- ldr r0, =(RSTC_KEY | RSTC_URSTEN | (4 << 8))
- ldr r1, =RSTC_MR
- str r0, [r1, #0]
-
-
- /*
- * Use 2 cycles for flash access.
- */
- ldr r1, =MC_BASE
- ldr r0, =MC_FWS_1FWS
- str r0, [r1, #MC_FMR_OFF]
-
-
- /*
- * Disable all interrupts. Useful for debugging w/o target reset.
- */
- ldr r1, =AIC_BASE
- mvn r0, #0
- str r0, [r1, #AIC_EOICR_OFF]
- str r0, [r1, #AIC_IDCR_OFF]
-
-
- /*
- * Setup a stack for each mode
- */
- msr CPSR_c, #ARM_MODE_UNDEF | I_BIT | F_BIT /* Undefined Instruction Mode */
- ldr sp, =__stack_und_end
-
- msr CPSR_c, #ARM_MODE_ABORT | I_BIT | F_BIT /* Abort Mode */
- ldr sp, =__stack_abt_end
-
- msr CPSR_c, #ARM_MODE_FIQ | I_BIT | F_BIT /* FIQ Mode */
- ldr sp, =__stack_fiq_end
-
- msr CPSR_c, #ARM_MODE_IRQ | I_BIT | F_BIT /* IRQ Mode */
- ldr sp, =__stack_irq_end
-
- msr CPSR_c, #ARM_MODE_SVC | I_BIT | F_BIT /* Supervisor Mode */
- ldr sp, =__stack_svc_end
-
-
- /*
- * Clear .bss section
- */
- ldr r1, =__bss_start
- ldr r2, =__bss_end
- ldr r3, =0
-bss_clear_loop:
- cmp r1, r2
- strne r3, [r1], #+4
- bne bss_clear_loop
-
-
- /*
- * Jump to main
- */
- mrs r0, cpsr
- bic r0, r0, #I_BIT | F_BIT /* Enable FIQ and IRQ interrupt */
- msr cpsr, r0
-
- mov r0, #0 /* No arguments */
- mov r1, #0 /* No arguments */
- ldr r2, =main
- mov lr, pc
- bx r2 /* And jump... */
-
-ExitFunction:
- nop
- nop
- nop
- b ExitFunction
-
-
-/****************************************************************************/
-/* Default interrupt handler */
-/****************************************************************************/
-
-UndefHandler:
- b UndefHandler
-
-SWIHandler:
- b SWIHandler
-
-PAbortHandler:
- b PAbortHandler
-
-DAbortHandler:
- b DAbortHandler
-
-IRQHandler:
- b IRQHandler
-
-FIQHandler:
- b FIQHandler
-
- .weak ExitFunction
- .weak UndefHandler, PAbortHandler, DAbortHandler
- .weak IRQHandler, FIQHandler
-
- .ltorg
-/*** EOF ***/
-
-
Index: src/flash/ocl/at91sam7x/dcc.c
+/**************************************************************************** +* Copyright (c) 2006 by Michael Fischer. All rights reserved. +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* 1. Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* 2. Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the distribution. +* 3. Neither the name of the author nor the names of its contributors may +* be used to endorse or promote products derived from this software +* without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL +* THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF +* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF +* SUCH DAMAGE. +* +**************************************************************************** +* +* History: +* +* 18.12.06 mifi First Version +* The hardware initialization is based on the startup file +* crtat91sam7x256_rom.S from NutOS 4.2.1. +* Therefore partial copyright by egnite Software GmbH. +****************************************************************************/ + +/* + * Some defines for the program status registers + */ + ARM_MODE_USER = 0x10 /* Normal User Mode */ + ARM_MODE_FIQ = 0x11 /* FIQ Fast Interrupts Mode */ + ARM_MODE_IRQ = 0x12 /* IRQ Standard Interrupts Mode */ + ARM_MODE_SVC = 0x13 /* Supervisor Interrupts Mode */ + ARM_MODE_ABORT = 0x17 /* Abort Processing memory Faults Mode */ + ARM_MODE_UNDEF = 0x1B /* Undefined Instructions Mode */ + ARM_MODE_SYS = 0x1F /* System Running in Priviledged Operating Mode */ + ARM_MODE_MASK = 0x1F + + I_BIT = 0x80 /* disable IRQ when I bit is set */ + F_BIT = 0x40 /* disable IRQ when I bit is set */ + +/* + * Register Base Address + */ + AIC_BASE = 0xFFFFF000 + AIC_EOICR_OFF = 0x130 + AIC_IDCR_OFF = 0x124 + + RSTC_MR = 0xFFFFFD08 + RSTC_KEY = 0xA5000000 + RSTC_URSTEN = 0x00000001 + + WDT_BASE = 0xFFFFFD40 + WDT_MR_OFF = 0x00000004 + WDT_WDDIS = 0x00008000 + + MC_BASE = 0xFFFFFF00 + MC_FMR_OFF = 0x00000060 + MC_FWS_1FWS = 0x00480100 + + .section .vectors,"ax" + .code 32 + +/****************************************************************************/ +/* Vector table and reset entry */ +/****************************************************************************/ +_vectors: + ldr pc, ResetAddr /* Reset */ + ldr pc, UndefAddr /* Undefined instruction */ + ldr pc, SWIAddr /* Software interrupt */ + ldr pc, PAbortAddr /* Prefetch abort */ + ldr pc, DAbortAddr /* Data abort */ + ldr pc, ReservedAddr /* Reserved */ + ldr pc, IRQAddr /* IRQ interrupt */ + ldr pc, FIQAddr /* FIQ interrupt */ + + +ResetAddr: .word ResetHandler +UndefAddr: .word UndefHandler +SWIAddr: .word SWIHandler +PAbortAddr: .word PAbortHandler +DAbortAddr: .word DAbortHandler +ReservedAddr: .word 0 +IRQAddr: .word IRQHandler +FIQAddr: .word FIQHandler + + .ltorg + + .section .init, "ax" + .code 32 + + .global ResetHandler + .global ExitFunction + .extern main +/****************************************************************************/ +/* Reset handler */ +/****************************************************************************/ +ResetHandler: + /* + * The watchdog is enabled after processor reset. Disable it. + */ + ldr r1, =WDT_BASE + ldr r0, =WDT_WDDIS + str r0, [r1, #WDT_MR_OFF] + + + /* + * Enable user reset: assertion length programmed to 1ms + */ + ldr r0, =(RSTC_KEY | RSTC_URSTEN | (4 << 8)) + ldr r1, =RSTC_MR + str r0, [r1, #0] + + + /* + * Use 2 cycles for flash access. + */ + ldr r1, =MC_BASE + ldr r0, =MC_FWS_1FWS + str r0, [r1, #MC_FMR_OFF] + + + /* + * Disable all interrupts. Useful for debugging w/o target reset. + */ + ldr r1, =AIC_BASE + mvn r0, #0 + str r0, [r1, #AIC_EOICR_OFF] + str r0, [r1, #AIC_IDCR_OFF] + + + /* + * Setup a stack for each mode + */ + msr CPSR_c, #ARM_MODE_UNDEF | I_BIT | F_BIT /* Undefined Instruction Mode */ + ldr sp, =__stack_und_end + + msr CPSR_c, #ARM_MODE_ABORT | I_BIT | F_BIT /* Abort Mode */ + ldr sp, =__stack_abt_end + + msr CPSR_c, #ARM_MODE_FIQ | I_BIT | F_BIT /* FIQ Mode */ + ldr sp, =__stack_fiq_end + + msr CPSR_c, #ARM_MODE_IRQ | I_BIT | F_BIT /* IRQ Mode */ + ldr sp, =__stack_irq_end + + msr CPSR_c, #ARM_MODE_SVC | I_BIT | F_BIT /* Supervisor Mode */ + ldr sp, =__stack_svc_end + + + /* + * Clear .bss section + */ + ldr r1, =__bss_start + ldr r2, =__bss_end + ldr r3, =0 +bss_clear_loop: + cmp r1, r2 + strne r3, [r1], #+4 + bne bss_clear_loop + + + /* + * Jump to main + */ + mrs r0, cpsr + bic r0, r0, #I_BIT | F_BIT /* Enable FIQ and IRQ interrupt */ + msr cpsr, r0 + + mov r0, #0 /* No arguments */ + mov r1, #0 /* No arguments */ + ldr r2, =main + mov lr, pc + bx r2 /* And jump... */ + +ExitFunction: + nop + nop + nop + b ExitFunction + + +/****************************************************************************/ +/* Default interrupt handler */ +/****************************************************************************/ + +UndefHandler: + b UndefHandler + +SWIHandler: + b SWIHandler + +PAbortHandler: + b PAbortHandler + +DAbortHandler: + b DAbortHandler + +IRQHandler: + b IRQHandler + +FIQHandler: + b FIQHandler + + .weak ExitFunction + .weak UndefHandler, PAbortHandler, DAbortHandler + .weak IRQHandler, FIQHandler + + .ltorg +/*** EOF ***/ diff --git a/src/flash/ocl/at91sam7x/dcc.c b/src/flash/ocl/at91sam7x/dcc.c index 2c352369..3507bbe5 100644 --- a/src/flash/ocl/at91sam7x/dcc.c +++ b/src/flash/ocl/at91sam7x/dcc.c @@ -1,51 +1,51 @@ -/***************************************************************************
- * Copyright (C) 2007 by Pavel Chromy *
- * chromy@asix.cz *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
- ***************************************************************************/
-#include "dcc.h"
-
-
-/* debug channel read (debugger->MCU) */
-uint32 dcc_rd(void)
-{
- volatile uint32 dcc_reg;
-
- do {
- asm volatile ("mrc p14, 0, %0, C0, C0" : "=r" (dcc_reg) : );
- } while ((dcc_reg&1)==0);
-
- asm volatile ("mrc p14, 0, %0, C1, C0" : "=r" (dcc_reg) : );
- return dcc_reg;
-}
-
-
-/* debug channel write (MCU->debugger) */
-int dcc_wr(uint32 data)
-{
- volatile uint32 dcc_reg;
-
- do {
- asm volatile ("mrc p14, 0, %0, C0, C0" : "=r" (dcc_reg) : );
- /* operation controled by master, cancel operation
- upon reception of data for immediate response */
- if (dcc_reg&1) return -1;
- } while (dcc_reg&2);
-
- asm volatile ("mcr p14, 0, %0, C1, C0" : : "r" (data));
- return 0;
-}
+/*************************************************************************** + * Copyright (C) 2007 by Pavel Chromy * + * chromy@asix.cz * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 2 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, write to the * + * Free Software Foundation, Inc., * + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * + ***************************************************************************/ +#include "dcc.h" + + +/* debug channel read (debugger->MCU) */ +uint32 dcc_rd(void) +{ + volatile uint32 dcc_reg; + + do { + asm volatile ("mrc p14, 0, %0, C0, C0" : "=r" (dcc_reg) : ); + } while ((dcc_reg&1)==0); + + asm volatile ("mrc p14, 0, %0, C1, C0" : "=r" (dcc_reg) : ); + return dcc_reg; +} + + +/* debug channel write (MCU->debugger) */ +int dcc_wr(uint32 data) +{ + volatile uint32 dcc_reg; + + do { + asm volatile ("mrc p14, 0, %0, C0, C0" : "=r" (dcc_reg) : ); + /* operation controled by master, cancel operation + upon reception of data for immediate response */ + if (dcc_reg&1) return -1; + } while (dcc_reg&2); + + asm volatile ("mcr p14, 0, %0, C1, C0" : : "r" (data)); + return 0; +} diff --git a/src/flash/ocl/at91sam7x/dcc.h b/src/flash/ocl/at91sam7x/dcc.h index 963df261..f41b1d27 100644 --- a/src/flash/ocl/at91sam7x/dcc.h +++ b/src/flash/ocl/at91sam7x/dcc.h @@ -1,31 +1,31 @@ -/***************************************************************************
- * Copyright (C) 2007 by Pavel Chromy *
- * chromy@asix.cz *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
- ***************************************************************************/
-#ifndef dccH
-#define dccH
-
-#include "platform.h"
-
-/* debug channel read (debugger->MCU) */
-extern uint32 dcc_rd(void);
-
-/* debug channel write (MCU->debugger) */
-extern int dcc_wr(uint32 data);
-
-#endif
+/*************************************************************************** + * Copyright (C) 2007 by Pavel Chromy * + * chromy@asix.cz * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 2 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, write to the * + * Free Software Foundation, Inc., * + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * + ***************************************************************************/ +#ifndef dccH +#define dccH + +#include "platform.h" + +/* debug channel read (debugger->MCU) */ +extern uint32 dcc_rd(void); + +/* debug channel write (MCU->debugger) */ +extern int dcc_wr(uint32 data); + +#endif diff --git a/src/flash/ocl/at91sam7x/main.c b/src/flash/ocl/at91sam7x/main.c index c9e93ddb..2a4d28bb 100644 --- a/src/flash/ocl/at91sam7x/main.c +++ b/src/flash/ocl/at91sam7x/main.c @@ -1,107 +1,107 @@ -/***************************************************************************
- * Copyright (C) 2007 by Pavel Chromy *
- * chromy@asix.cz *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
- ***************************************************************************/
-#include "platform.h"
-
-#include "ocl.h"
-#include "dcc.h"
-#include "samflash.h"
-
-
-#define BUFSIZE 1024 /* words, i.e. 4 KiB */
-uint32 buffer[1024];
-
-void cmd_flash(uint32 cmd)
-{
- unsigned int len;
- uint32 adr;
- uint32 chksum;
- unsigned int bi; /* buffer index */
- unsigned int bi_start; /* receive start mark */
- unsigned int bi_end; /* receive end mark */
- unsigned int ofs;
- int pagenum;
- int result;
-
- adr=dcc_rd();
- len=cmd&0xffff;
- ofs=adr%flash_page_size;
- bi_start=ofs/4;
- bi_end=(ofs+len+3)/4;
-
- if (bi_end>BUFSIZE) {
- dcc_wr(OCL_BUFF_OVER);
- return;
- }
-
- chksum=OCL_CHKS_INIT;
- for (bi=0; bi<bi_end; bi++) chksum^=buffer[bi]=dcc_rd();
-
- if (dcc_rd()!=chksum) {
- dcc_wr(OCL_CHKS_FAIL);
- return;
- }
-
- /* fill in unused positions with unprogrammed values */
- for (bi=0; bi<bi_start; bi++) buffer[bi]=0xffffffff;
- for (bi=bi_end; bi%flash_page_size; bi++) buffer[bi]=0xffffffff;
-
- result=0;
- pagenum=adr/flash_page_size;
- for (bi=0; bi<bi_end; bi+=flash_page_size/4) {
- result=flash_page_program(buffer+bi, pagenum++);
- if (result) break;
- }
-
- /* verify written data */
- if (!result) result=flash_verify(adr, len, ((uint8 *)buffer)+ofs);
-
- dcc_wr(OCL_CMD_DONE|result);
-}
-
-
-int main (void)
-{
- uint32 cmd;
-
- for (;;) {
- cmd=dcc_rd();
- switch (cmd&OCL_CMD_MASK) {
- case OCL_PROBE:
- dcc_wr(OCL_CMD_DONE|flash_init());
- dcc_wr(0x100000); /* base */
- dcc_wr(flash_page_count*flash_page_size); /* size */
- dcc_wr(1); /* num_sectors */
- dcc_wr(4096 | ((unsigned long) flash_page_size<<16)); /* buflen and bufalign */
- break;
- case OCL_ERASE_ALL:
- dcc_wr(OCL_CMD_DONE|flash_erase_all());
- break;
- case OCL_FLASH_BLOCK:
- cmd_flash(cmd);
- break;
- default:
- /* unknown command */
- dcc_wr(OCL_CMD_ERR);
- break;
- }
- }
-
- return(0); /* we shall never get here, just to supress compiler warning */
-}
+/*************************************************************************** + * Copyright (C) 2007 by Pavel Chromy * + * chromy@asix.cz * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 2 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, write to the * + * Free Software Foundation, Inc., * + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * + ***************************************************************************/ +#include "platform.h" + +#include "ocl.h" +#include "dcc.h" +#include "samflash.h" + + +#define BUFSIZE 1024 /* words, i.e. 4 KiB */ +uint32 buffer[1024]; + +void cmd_flash(uint32 cmd) +{ + unsigned int len; + uint32 adr; + uint32 chksum; + unsigned int bi; /* buffer index */ + unsigned int bi_start; /* receive start mark */ + unsigned int bi_end; /* receive end mark */ + unsigned int ofs; + int pagenum; + int result; + + adr=dcc_rd(); + len=cmd&0xffff; + ofs=adr%flash_page_size; + bi_start=ofs/4; + bi_end=(ofs+len+3)/4; + + if (bi_end>BUFSIZE) { + dcc_wr(OCL_BUFF_OVER); + return; + } + + chksum=OCL_CHKS_INIT; + for (bi=0; bi<bi_end; bi++) chksum^=buffer[bi]=dcc_rd(); + + if (dcc_rd()!=chksum) { + dcc_wr(OCL_CHKS_FAIL); + return; + } + + /* fill in unused positions with unprogrammed values */ + for (bi=0; bi<bi_start; bi++) buffer[bi]=0xffffffff; + for (bi=bi_end; bi%flash_page_size; bi++) buffer[bi]=0xffffffff; + + result=0; + pagenum=adr/flash_page_size; + for (bi=0; bi<bi_end; bi+=flash_page_size/4) { + result=flash_page_program(buffer+bi, pagenum++); + if (result) break; + } + + /* verify written data */ + if (!result) result=flash_verify(adr, len, ((uint8 *)buffer)+ofs); + + dcc_wr(OCL_CMD_DONE|result); +} + + +int main (void) +{ + uint32 cmd; + + for (;;) { + cmd=dcc_rd(); + switch (cmd&OCL_CMD_MASK) { + case OCL_PROBE: + dcc_wr(OCL_CMD_DONE|flash_init()); + dcc_wr(0x100000); /* base */ + dcc_wr(flash_page_count*flash_page_size); /* size */ + dcc_wr(1); /* num_sectors */ + dcc_wr(4096 | ((unsigned long) flash_page_size<<16)); /* buflen and bufalign */ + break; + case OCL_ERASE_ALL: + dcc_wr(OCL_CMD_DONE|flash_erase_all()); + break; + case OCL_FLASH_BLOCK: + cmd_flash(cmd); + break; + default: + /* unknown command */ + dcc_wr(OCL_CMD_ERR); + break; + } + } + + return(0); /* we shall never get here, just to supress compiler warning */ +} diff --git a/src/flash/ocl/at91sam7x/makefile b/src/flash/ocl/at91sam7x/makefile index b48ed70c..d9944a42 100644 --- a/src/flash/ocl/at91sam7x/makefile +++ b/src/flash/ocl/at91sam7x/makefile @@ -1,130 +1,130 @@ -##############################################################################################
-# Start of default section
-#
-
-TRGT = arm-elf-
-CC = $(TRGT)gcc
-CP = $(TRGT)objcopy
-AS = $(TRGT)gcc -x assembler-with-cpp
-HEX = $(CP) -O ihex
-BIN = $(CP) -O binary
-OBJDUMP = $(TRGT)objdump
-
-MCU = arm7tdmi
-
-# List all default C defines here, like -D_DEBUG=1
-DDEFS =
-
-# List all default ASM defines here, like -D_DEBUG=1
-DADEFS =
-
-# List all default directories to look for include files here
-DINCDIR =
-
-# List the default directory to look for the libraries here
-DLIBDIR =
-
-# List all default libraries here
-DLIBS =
-
-#
-# End of default section
-##############################################################################################
-
-##############################################################################################
-# Start of user section
-#
-
-# Define project name here
-PROJECT = at91sam7x_ocl
-
-# Define linker script file here
-LDSCRIPT= at91sam7x_ram.ld
-
-# List all user C define here, like -D_DEBUG=1
-UDEFS =
-
-# Define ASM defines here
-UADEFS =
-
-# List C source files here
-SRC = main.c dcc.c samflash.c
-
-# List ASM source files here
-ASRC = crt.s
-
-# List all user directories here
-UINCDIR =
-
-# List the user directory to look for the libraries here
-ULIBDIR =
-
-# List all user libraries here
-ULIBS =
-
-# Define optimisation level here
-OPT = -O2
-
-#
-# End of user defines
-##############################################################################################
-
-
-INCDIR = $(patsubst %,-I%,$(DINCDIR) $(UINCDIR))
-LIBDIR = $(patsubst %,-L%,$(DLIBDIR) $(ULIBDIR))
-DEFS = $(DDEFS) $(UDEFS)
-ADEFS = $(DADEFS) $(UADEFS)
-OBJS = $(ASRC:.s=.o) $(SRC:.c=.o)
-LIBS = $(DLIBS) $(ULIBS)
-MCFLAGS = -mcpu=$(MCU)
-
-ASFLAGS = $(MCFLAGS) -g -gdwarf-2 -Wa,-amhls=$(<:.s=.lst) $(ADEFS)
-CPFLAGS = $(MCFLAGS) $(OPT) -gdwarf-2 -mthumb-interwork -fomit-frame-pointer -Wall -Wstrict-prototypes -fverbose-asm -Wa,-ahlms=$(<:.c=.lst) $(DEFS)
-LDFLAGS = $(MCFLAGS) -nostartfiles -T$(LDSCRIPT) -Wl,-Map=$(PROJECT).map,--cref,--no-warn-mismatch $(LIBDIR)
-
-# Generate dependency information
-#CPFLAGS += -MD -MP -MF .dep/$(@F).d
-
-#
-# makefile rules
-#
-
-all: $(OBJS) $(PROJECT).elf $(PROJECT).hex $(PROJECT).bin $(PROJECT).lst
-
-%o : %c
- $(CC) -c $(CPFLAGS) -I . $(INCDIR) $< -o $@
-
-%o : %s
- $(AS) -c $(ASFLAGS) $< -o $@
-
-%elf: $(OBJS)
- $(CC) $(OBJS) $(LDFLAGS) $(LIBS) -o $@
-
-%hex: %elf
- $(HEX) $< $@
-
-%bin: %elf
- $(BIN) $< $@
-
-%.lst: %.elf
- $(OBJDUMP) -h -S $< > $@
-
-clean:
- -rm -f $(OBJS)
- -rm -f $(PROJECT).elf
- -rm -f $(PROJECT).map
- -rm -f $(PROJECT).hex
- -rm -f $(PROJECT).bin
- -rm -f $(PROJECT).lst
- -rm -f $(SRC:.c=.c.bak)
- -rm -f $(SRC:.c=.lst)
- -rm -f $(ASRC:.s=.s.bak)
- -rm -f $(ASRC:.s=.lst)
- -rm -fR .dep
-
-#
-# Include the dependency files, should be the last of the makefile
-#
-#-include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*)
-
+############################################################################################## +# Start of default section +# + +TRGT = arm-elf- +CC = $(TRGT)gcc +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +HEX = $(CP) -O ihex +BIN = $(CP) -O binary +OBJDUMP = $(TRGT)objdump + +MCU = arm7tdmi + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################################## + +############################################################################################## +# Start of user section +# + +# Define project name here +PROJECT = at91sam7x_ocl + +# Define linker script file here +LDSCRIPT= at91sam7x_ram.ld + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List C source files here +SRC = main.c dcc.c samflash.c + +# List ASM source files here +ASRC = crt.s + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# Define optimisation level here +OPT = -O2 + +# +# End of user defines +############################################################################################## + + +INCDIR = $(patsubst %,-I%,$(DINCDIR) $(UINCDIR)) +LIBDIR = $(patsubst %,-L%,$(DLIBDIR) $(ULIBDIR)) +DEFS = $(DDEFS) $(UDEFS) +ADEFS = $(DADEFS) $(UADEFS) +OBJS = $(ASRC:.s=.o) $(SRC:.c=.o) +LIBS = $(DLIBS) $(ULIBS) +MCFLAGS = -mcpu=$(MCU) + +ASFLAGS = $(MCFLAGS) -g -gdwarf-2 -Wa,-amhls=$(<:.s=.lst) $(ADEFS) +CPFLAGS = $(MCFLAGS) $(OPT) -gdwarf-2 -mthumb-interwork -fomit-frame-pointer -Wall -Wstrict-prototypes -fverbose-asm -Wa,-ahlms=$(<:.c=.lst) $(DEFS) +LDFLAGS = $(MCFLAGS) -nostartfiles -T$(LDSCRIPT) -Wl,-Map=$(PROJECT).map,--cref,--no-warn-mismatch $(LIBDIR) + +# Generate dependency information +#CPFLAGS += -MD -MP -MF .dep/$(@F).d + +# +# makefile rules +# + +all: $(OBJS) $(PROJECT).elf $(PROJECT).hex $(PROJECT).bin $(PROJECT).lst + +%o : %c + $(CC) -c $(CPFLAGS) -I . $(INCDIR) $< -o $@ + +%o : %s + $(AS) -c $(ASFLAGS) $< -o $@ + +%elf: $(OBJS) + $(CC) $(OBJS) $(LDFLAGS) $(LIBS) -o $@ + +%hex: %elf + $(HEX) $< $@ + +%bin: %elf + $(BIN) $< $@ + +%.lst: %.elf + $(OBJDUMP) -h -S $< > $@ + +clean: + -rm -f $(OBJS) + -rm -f $(PROJECT).elf + -rm -f $(PROJECT).map + -rm -f $(PROJECT).hex + -rm -f $(PROJECT).bin + -rm -f $(PROJECT).lst + -rm -f $(SRC:.c=.c.bak) + -rm -f $(SRC:.c=.lst) + -rm -f $(ASRC:.s=.s.bak) + -rm -f $(ASRC:.s=.lst) + -rm -fR .dep + +# +# Include the dependency files, should be the last of the makefile +# +#-include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*) + # *** EOF ***
\ No newline at end of file diff --git a/src/flash/ocl/at91sam7x/ocl.h b/src/flash/ocl/at91sam7x/ocl.h index 8c677b0e..d5c430be 100644 --- a/src/flash/ocl/at91sam7x/ocl.h +++ b/src/flash/ocl/at91sam7x/ocl.h @@ -1,40 +1,40 @@ -/***************************************************************************
- * Copyright (C) 2007 by Pavel Chromy *
- * chromy@asix.cz *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
- ***************************************************************************/
-#ifndef OCL_H
-#define OCL_H
-
-/* command/response mask */
-#define OCL_CMD_MASK 0xFFFF0000L
-
-/* commads */
-#define OCL_FLASH_BLOCK 0x0CFB0000L
-#define OCL_ERASE_BLOCK 0x0CEB0000L
-#define OCL_ERASE_ALL 0x0CEA0000L
-#define OCL_PROBE 0x0CBE0000L
-
-/* responses */
-#define OCL_CMD_DONE 0x0ACD0000L
-#define OCL_CMD_ERR 0x0ACE0000L
-#define OCL_CHKS_FAIL 0x0ACF0000L
-#define OCL_BUFF_OVER 0x0AB00000L
-
-#define OCL_CHKS_INIT 0xC100CD0CL
-
-#endif /* OCL_H */
+/*************************************************************************** + * Copyright (C) 2007 by Pavel Chromy * + * chromy@asix.cz * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 2 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, write to the * + * Free Software Foundation, Inc., * + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * + ***************************************************************************/ +#ifndef OCL_H +#define OCL_H + +/* command/response mask */ +#define OCL_CMD_MASK 0xFFFF0000L + +/* commads */ +#define OCL_FLASH_BLOCK 0x0CFB0000L +#define OCL_ERASE_BLOCK 0x0CEB0000L +#define OCL_ERASE_ALL 0x0CEA0000L +#define OCL_PROBE 0x0CBE0000L + +/* responses */ +#define OCL_CMD_DONE 0x0ACD0000L +#define OCL_CMD_ERR 0x0ACE0000L +#define OCL_CHKS_FAIL 0x0ACF0000L +#define OCL_BUFF_OVER 0x0AB00000L + +#define OCL_CHKS_INIT 0xC100CD0CL + +#endif /* OCL_H */ diff --git a/src/flash/ocl/at91sam7x/platform.h b/src/flash/ocl/at91sam7x/platform.h index c73544af..f1eea976 100644 --- a/src/flash/ocl/at91sam7x/platform.h +++ b/src/flash/ocl/at91sam7x/platform.h @@ -1,46 +1,46 @@ -/***************************************************************************
- * Copyright (C) 2007 by Pavel Chromy *
- * chromy@asix.cz *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
- ***************************************************************************/
-#ifndef platformH
-#define platformH
-
-#include "samregs.h"
-
-
-#define outb(_reg, _val) (*((volatile unsigned char *)(_reg)) = (_val))
-#define outw(_reg, _val) (*((volatile unsigned short *)(_reg)) = (_val))
-#define outr(_reg, _val) (*((volatile unsigned int *)(_reg)) = (_val))
-
-#define inb(_reg) (*((volatile unsigned char *)(_reg)))
-#define inw(_reg) (*((volatile unsigned short *)(_reg)))
-#define inr(_reg) (*((volatile unsigned int *)(_reg)))
-
-#define _BV(bit) (1 << (bit))
-
-
-typedef signed char int8;
-typedef unsigned char uint8;
-
-typedef signed short int16;
-typedef unsigned short uint16;
-
-typedef signed int int32;
-typedef unsigned int uint32;
-
-#endif
+/*************************************************************************** + * Copyright (C) 2007 by Pavel Chromy * + * chromy@asix.cz * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 2 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, write to the * + * Free Software Foundation, Inc., * + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * + ***************************************************************************/ +#ifndef platformH +#define platformH + +#include "samregs.h" + + +#define outb(_reg, _val) (*((volatile unsigned char *)(_reg)) = (_val)) +#define outw(_reg, _val) (*((volatile unsigned short *)(_reg)) = (_val)) +#define outr(_reg, _val) (*((volatile unsigned int *)(_reg)) = (_val)) + +#define inb(_reg) (*((volatile unsigned char *)(_reg))) +#define inw(_reg) (*((volatile unsigned short *)(_reg))) +#define inr(_reg) (*((volatile unsigned int *)(_reg))) + +#define _BV(bit) (1 << (bit)) + + +typedef signed char int8; +typedef unsigned char uint8; + +typedef signed short int16; +typedef unsigned short uint16; + +typedef signed int int32; +typedef unsigned int uint32; + +#endif diff --git a/src/flash/ocl/at91sam7x/samflash.c b/src/flash/ocl/at91sam7x/samflash.c index 253e410c..a48e6cfd 100644 --- a/src/flash/ocl/at91sam7x/samflash.c +++ b/src/flash/ocl/at91sam7x/samflash.c @@ -1,196 +1,196 @@ -/***************************************************************************
- * Copyright (C) 2007 by Pavel Chromy *
- * chromy@asix.cz *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
- ***************************************************************************/
-#include "samflash.h"
-
-
-unsigned int flash_page_count=1024;
-unsigned int flash_page_size=256;
-
-/* pages per lock bit */
-unsigned int flash_lock_pages=1024/16;
-
-
-/* detect chip and set loader parameters */
-int flash_init(void)
-{
- unsigned int nvpsiz;
-
- nvpsiz=(inr(DBGU_CIDR)>>8)&0xf;
-
- switch (nvpsiz) {
- case 3:
- /* AT91SAM7x32 */
- flash_page_count=256;
- flash_page_size=128;
- flash_lock_pages=256/8;
- break;
- case 5:
- /* AT91SAM7x64 */
- flash_page_count=512;
- flash_page_size=128;
- flash_lock_pages=512/16;
- break;
- case 7:
- /* AT91SAM7x128*/
- flash_page_count=512;
- flash_page_size=256;
- flash_lock_pages=512/8;
- break;
- case 9:
- /* AT91SAM7x256 */
- flash_page_count=1024;
- flash_page_size=256;
- flash_lock_pages=1024/16;
- break;
- case 10:
- /* AT91SAM7x512 */
- flash_page_count=2048;
- flash_page_size=256;
- flash_lock_pages=2048/32;
- break;
- default:
- return FLASH_STAT_INITE;
- }
- return FLASH_STAT_OK;
-}
-
-
-/* program single flash page */
-int flash_page_program(uint32 *data, int page_num)
-{
- int i;
- int efc_ofs;
-
- uint32 *flash_ptr;
- uint32 *data_ptr;
-
- /* select proper controller */
- if (page_num>=1024) efc_ofs=0x10;
- else efc_ofs=0;
-
- /* wait until FLASH is ready, just for sure */
- while ((inr(MC_FSR+efc_ofs)&MC_FRDY)==0);
-
- /* calculate page address, only lower 8 bits are used to address the latch,
- but the upper part of address is needed for writing to proper EFC */
- flash_ptr=(uint32 *)(FLASH_AREA_ADDR+(page_num*flash_page_size));
- data_ptr=data;
-
- /* copy data to latch */
- for (i=flash_page_size/4; i; i--) {
- /* we do not use memcpy to be sure that only 32 bit access is used */
- *(flash_ptr++)=*(data_ptr++);
- }
-
- /* page number and page write command to FCR */
- outr(MC_FCR+efc_ofs, ((page_num&0x3ff)<<8) | MC_KEY | MC_FCMD_WP);
-
- /* wait until it's done */
- while ((inr(MC_FSR+efc_ofs)&MC_FRDY)==0);
-
- /* check for errors */
- if ((inr(MC_FSR+efc_ofs)&MC_PROGE)) return FLASH_STAT_PROGE;
- if ((inr(MC_FSR+efc_ofs)&MC_LOCKE)) return FLASH_STAT_LOCKE;
-
-#if 0
- /* verify written data */
- flash_ptr=(uint32 *)(FLASH_AREA_ADDR+(page_num*flash_page_size));
- data_ptr=data;
-
- for (i=flash_page_size/4; i; i--) {
- if (*(flash_ptr++)!=*(data_ptr++)) return FLASH_STAT_VERIFE;
- }
-#endif
-
- return FLASH_STAT_OK;
-}
-
-
-int flash_erase_plane(int efc_ofs)
-{
- unsigned int lockbits;
- int page_num;
-
- page_num=0;
- lockbits=inr(MC_FSR+efc_ofs)>>16;
- while (lockbits) {
- if (lockbits&1) {
-
- /* wait until FLASH is ready, just for sure */
- while ((inr(MC_FSR+efc_ofs)&MC_FRDY)==0);
-
- outr(MC_FCR+efc_ofs, ((page_num&0x3ff)<<8) | 0x5a000004);
-
- /* wait until it's done */
- while ((inr(MC_FSR+efc_ofs)&MC_FRDY)==0);
-
- /* check for errors */
- if ((inr(MC_FSR+efc_ofs)&MC_PROGE)) return FLASH_STAT_PROGE;
- if ((inr(MC_FSR+efc_ofs)&MC_LOCKE)) return FLASH_STAT_LOCKE;
-
- }
- if ((page_num+=flash_lock_pages)>flash_page_count) break;
- lockbits>>=1;
- }
-
- /* wait until FLASH is ready, just for sure */
- while ((inr(MC_FSR+efc_ofs)&MC_FRDY)==0);
-
- /* erase all command to FCR */
- outr(MC_FCR+efc_ofs, 0x5a000008);
-
- /* wait until it's done */
- while ((inr(MC_FSR+efc_ofs)&MC_FRDY)==0);
-
- /* check for errors */
- if ((inr(MC_FSR+efc_ofs)&MC_PROGE)) return FLASH_STAT_PROGE;
- if ((inr(MC_FSR+efc_ofs)&MC_LOCKE)) return FLASH_STAT_LOCKE;
-
- /* set no erase before programming */
- outr(MC_FMR+efc_ofs, inr(MC_FMR+efc_ofs)|0x80);
-
- return FLASH_STAT_OK;
-}
-
-
-/* erase whole chip */
-int flash_erase_all(void)
-{
- int result;
-
- if ((result=flash_erase_plane(0))!=FLASH_STAT_OK) return result;
-
- /* the second flash controller, if any */
- if (flash_page_count>1024) result=flash_erase_plane(0x10);
-
- return result;
-}
-
-
-int flash_verify(uint32 adr, unsigned int len, uint8 *src)
-{
- unsigned char *flash_ptr;
-
- flash_ptr=(uint8 *)FLASH_AREA_ADDR+adr;
- for ( ;len; len--) {
- if (*(flash_ptr++)!=*(src++)) return FLASH_STAT_VERIFE;
- }
- return FLASH_STAT_OK;
-}
+/*************************************************************************** + * Copyright (C) 2007 by Pavel Chromy * + * chromy@asix.cz * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 2 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, write to the * + * Free Software Foundation, Inc., * + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * + ***************************************************************************/ +#include "samflash.h" + + +unsigned int flash_page_count=1024; +unsigned int flash_page_size=256; + +/* pages per lock bit */ +unsigned int flash_lock_pages=1024/16; + + +/* detect chip and set loader parameters */ +int flash_init(void) +{ + unsigned int nvpsiz; + + nvpsiz=(inr(DBGU_CIDR)>>8)&0xf; + + switch (nvpsiz) { + case 3: + /* AT91SAM7x32 */ + flash_page_count=256; + flash_page_size=128; + flash_lock_pages=256/8; + break; + case 5: + /* AT91SAM7x64 */ + flash_page_count=512; + flash_page_size=128; + flash_lock_pages=512/16; + break; + case 7: + /* AT91SAM7x128*/ + flash_page_count=512; + flash_page_size=256; + flash_lock_pages=512/8; + break; + case 9: + /* AT91SAM7x256 */ + flash_page_count=1024; + flash_page_size=256; + flash_lock_pages=1024/16; + break; + case 10: + /* AT91SAM7x512 */ + flash_page_count=2048; + flash_page_size=256; + flash_lock_pages=2048/32; + break; + default: + return FLASH_STAT_INITE; + } + return FLASH_STAT_OK; +} + + +/* program single flash page */ +int flash_page_program(uint32 *data, int page_num) +{ + int i; + int efc_ofs; + + uint32 *flash_ptr; + uint32 *data_ptr; + + /* select proper controller */ + if (page_num>=1024) efc_ofs=0x10; + else efc_ofs=0; + + /* wait until FLASH is ready, just for sure */ + while ((inr(MC_FSR+efc_ofs)&MC_FRDY)==0); + + /* calculate page address, only lower 8 bits are used to address the latch, + but the upper part of address is needed for writing to proper EFC */ + flash_ptr=(uint32 *)(FLASH_AREA_ADDR+(page_num*flash_page_size)); + data_ptr=data; + + /* copy data to latch */ + for (i=flash_page_size/4; i; i--) { + /* we do not use memcpy to be sure that only 32 bit access is used */ + *(flash_ptr++)=*(data_ptr++); + } + + /* page number and page write command to FCR */ + outr(MC_FCR+efc_ofs, ((page_num&0x3ff)<<8) | MC_KEY | MC_FCMD_WP); + + /* wait until it's done */ + while ((inr(MC_FSR+efc_ofs)&MC_FRDY)==0); + + /* check for errors */ + if ((inr(MC_FSR+efc_ofs)&MC_PROGE)) return FLASH_STAT_PROGE; + if ((inr(MC_FSR+efc_ofs)&MC_LOCKE)) return FLASH_STAT_LOCKE; + +#if 0 + /* verify written data */ + flash_ptr=(uint32 *)(FLASH_AREA_ADDR+(page_num*flash_page_size)); + data_ptr=data; + + for (i=flash_page_size/4; i; i--) { + if (*(flash_ptr++)!=*(data_ptr++)) return FLASH_STAT_VERIFE; + } +#endif + + return FLASH_STAT_OK; +} + + +int flash_erase_plane(int efc_ofs) +{ + unsigned int lockbits; + int page_num; + + page_num=0; + lockbits=inr(MC_FSR+efc_ofs)>>16; + while (lockbits) { + if (lockbits&1) { + + /* wait until FLASH is ready, just for sure */ + while ((inr(MC_FSR+efc_ofs)&MC_FRDY)==0); + + outr(MC_FCR+efc_ofs, ((page_num&0x3ff)<<8) | 0x5a000004); + + /* wait until it's done */ + while ((inr(MC_FSR+efc_ofs)&MC_FRDY)==0); + + /* check for errors */ + if ((inr(MC_FSR+efc_ofs)&MC_PROGE)) return FLASH_STAT_PROGE; + if ((inr(MC_FSR+efc_ofs)&MC_LOCKE)) return FLASH_STAT_LOCKE; + + } + if ((page_num+=flash_lock_pages)>flash_page_count) break; + lockbits>>=1; + } + + /* wait until FLASH is ready, just for sure */ + while ((inr(MC_FSR+efc_ofs)&MC_FRDY)==0); + + /* erase all command to FCR */ + outr(MC_FCR+efc_ofs, 0x5a000008); + + /* wait until it's done */ + while ((inr(MC_FSR+efc_ofs)&MC_FRDY)==0); + + /* check for errors */ + if ((inr(MC_FSR+efc_ofs)&MC_PROGE)) return FLASH_STAT_PROGE; + if ((inr(MC_FSR+efc_ofs)&MC_LOCKE)) return FLASH_STAT_LOCKE; + + /* set no erase before programming */ + outr(MC_FMR+efc_ofs, inr(MC_FMR+efc_ofs)|0x80); + + return FLASH_STAT_OK; +} + + +/* erase whole chip */ +int flash_erase_all(void) +{ + int result; + + if ((result=flash_erase_plane(0))!=FLASH_STAT_OK) return result; + + /* the second flash controller, if any */ + if (flash_page_count>1024) result=flash_erase_plane(0x10); + + return result; +} + + +int flash_verify(uint32 adr, unsigned int len, uint8 *src) +{ + unsigned char *flash_ptr; + + flash_ptr=(uint8 *)FLASH_AREA_ADDR+adr; + for ( ;len; len--) { + if (*(flash_ptr++)!=*(src++)) return FLASH_STAT_VERIFE; + } + return FLASH_STAT_OK; +} diff --git a/src/flash/ocl/at91sam7x/samflash.h b/src/flash/ocl/at91sam7x/samflash.h index c793b9e8..136e3147 100644 --- a/src/flash/ocl/at91sam7x/samflash.h +++ b/src/flash/ocl/at91sam7x/samflash.h @@ -1,48 +1,48 @@ -/***************************************************************************
- * Copyright (C) 2007 by Pavel Chromy *
- * chromy@asix.cz *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
- ***************************************************************************/
-#ifndef samflashH
-#define samflashH
-
-#include "platform.h"
-
-#define FLASH_AREA_ADDR 0x100000
-
-#define FLASH_STAT_OK 0
-#define FLASH_STAT_PROGE 1
-#define FLASH_STAT_LOCKE 2
-#define FLASH_STAT_VERIFE 3
-#define FLASH_STAT_INITE 4
-
-extern unsigned int flash_page_count;
-extern unsigned int flash_page_size; /* words */
-
-/* detect chip and set loader parameters */
-extern int flash_init(void);
-
-/* program single flash page */
-extern int flash_page_program(uint32 *data, int page_num);
-
-/* erase whole chip */
-extern int flash_erase_all(void);
-
-/* verify written data */
-extern int flash_verify(uint32 adr, unsigned int len, uint8 *src);
-
-#endif
+/*************************************************************************** + * Copyright (C) 2007 by Pavel Chromy * + * chromy@asix.cz * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 2 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, write to the * + * Free Software Foundation, Inc., * + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * + ***************************************************************************/ +#ifndef samflashH +#define samflashH + +#include "platform.h" + +#define FLASH_AREA_ADDR 0x100000 + +#define FLASH_STAT_OK 0 +#define FLASH_STAT_PROGE 1 +#define FLASH_STAT_LOCKE 2 +#define FLASH_STAT_VERIFE 3 +#define FLASH_STAT_INITE 4 + +extern unsigned int flash_page_count; +extern unsigned int flash_page_size; /* words */ + +/* detect chip and set loader parameters */ +extern int flash_init(void); + +/* program single flash page */ +extern int flash_page_program(uint32 *data, int page_num); + +/* erase whole chip */ +extern int flash_erase_all(void); + +/* verify written data */ +extern int flash_verify(uint32 adr, unsigned int len, uint8 *src); + +#endif diff --git a/src/flash/ocl/at91sam7x/samregs.h b/src/flash/ocl/at91sam7x/samregs.h index 7d3654fe..b206fd28 100644 --- a/src/flash/ocl/at91sam7x/samregs.h +++ b/src/flash/ocl/at91sam7x/samregs.h @@ -1,83 +1,83 @@ -/*
- * Copyright (C) 2005-2006 by egnite Software GmbH. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the copyright holders nor the names of
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE
- * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
- * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * For additional information see http://www.ethernut.de/
- */
-
-
-#ifndef samregsH
-#define samregsH
-
-
-/*
- * Register definitions below copied from NutOS
- */
-
-#define DBGU_BASE 0xFFFFF200 /*!< \brief DBGU base address. */
-
-#define DBGU_CIDR_OFF 0x00000040 /*!< \brief DBGU chip ID register offset. */
-#define DBGU_CIDR (DBGU_BASE + DBGU_CIDR_OFF) /*!< \brief DBGU chip ID register. */
-
-
-#define MC_BASE 0xFFFFFF00 /*!< \brief Memory controller base. */
-
-#define MC_FMR_OFF 0x00000060 /*!< \brief MC flash mode register offset. */
-#define MC_FMR (MC_BASE + MC_FMR_OFF) /*!< \brief MC flash mode register address. */
-#define MC_FRDY 0x00000001 /*!< \brief Flash ready. */
-#define MC_LOCKE 0x00000004 /*!< \brief Lock error. */
-#define MC_PROGE 0x00000008 /*!< \brief Programming error. */
-#define MC_NEBP 0x00000080 /*!< \brief No erase before programming. */
-#define MC_FWS_MASK 0x00000300 /*!< \brief Flash wait state mask. */
-#define MC_FWS_1R2W 0x00000000 /*!< \brief 1 cycle for read, 2 for write operations. */
-#define MC_FWS_2R3W 0x00000100 /*!< \brief 2 cycles for read, 3 for write operations. */
-#define MC_FWS_3R4W 0x00000200 /*!< \brief 3 cycles for read, 4 for write operations. */
-#define MC_FWS_4R4W 0x00000300 /*!< \brief 4 cycles for read and write operations. */
-#define MC_FMCN_MASK 0x00FF0000 /*!< \brief Flash microsecond cycle number mask. */
-
-#define MC_FCR_OFF 0x00000064 /*!< \brief MC flash command register offset. */
-#define MC_FCR (MC_BASE + MC_FCR_OFF) /*!< \brief MC flash command register address. */
-#define MC_FCMD_MASK 0x0000000F /*!< \brief Flash command mask. */
-#define MC_FCMD_NOP 0x00000000 /*!< \brief No command. */
-#define MC_FCMD_WP 0x00000001 /*!< \brief Write page. */
-#define MC_FCMD_SLB 0x00000002 /*!< \brief Set lock bit. */
-#define MC_FCMD_WPL 0x00000003 /*!< \brief Write page and lock. */
-#define MC_FCMD_CLB 0x00000004 /*!< \brief Clear lock bit. */
-#define MC_FCMD_EA 0x00000008 /*!< \brief Erase all. */
-#define MC_FCMD_SGPB 0x0000000B /*!< \brief Set general purpose NVM bit. */
-#define MC_FCMD_CGPB 0x0000000D /*!< \brief Clear general purpose NVM bit. */
-#define MC_FCMD_SSB 0x0000000F /*!< \brief Set security bit. */
-#define MC_PAGEN_MASK 0x0003FF00 /*!< \brief Page number mask. */
-#define MC_KEY 0x5A000000 /*!< \brief Writing protect key. */
-
-#define MC_FSR_OFF 0x00000068 /*!< \brief MC flash status register offset. */
-#define MC_FSR (MC_BASE + MC_FSR_OFF) /*!< \brief MC flash status register address. */
-#define MC_SECURITY 0x00000010 /*!< \brief Security bit status. */
-
-
-#endif
+/* + * Copyright (C) 2005-2006 by egnite Software GmbH. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holders nor the names of + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE + * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF + * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * For additional information see http://www.ethernut.de/ + */ + + +#ifndef samregsH +#define samregsH + + +/* + * Register definitions below copied from NutOS + */ + +#define DBGU_BASE 0xFFFFF200 /*!< \brief DBGU base address. */ + +#define DBGU_CIDR_OFF 0x00000040 /*!< \brief DBGU chip ID register offset. */ +#define DBGU_CIDR (DBGU_BASE + DBGU_CIDR_OFF) /*!< \brief DBGU chip ID register. */ + + +#define MC_BASE 0xFFFFFF00 /*!< \brief Memory controller base. */ + +#define MC_FMR_OFF 0x00000060 /*!< \brief MC flash mode register offset. */ +#define MC_FMR (MC_BASE + MC_FMR_OFF) /*!< \brief MC flash mode register address. */ +#define MC_FRDY 0x00000001 /*!< \brief Flash ready. */ +#define MC_LOCKE 0x00000004 /*!< \brief Lock error. */ +#define MC_PROGE 0x00000008 /*!< \brief Programming error. */ +#define MC_NEBP 0x00000080 /*!< \brief No erase before programming. */ +#define MC_FWS_MASK 0x00000300 /*!< \brief Flash wait state mask. */ +#define MC_FWS_1R2W 0x00000000 /*!< \brief 1 cycle for read, 2 for write operations. */ +#define MC_FWS_2R3W 0x00000100 /*!< \brief 2 cycles for read, 3 for write operations. */ +#define MC_FWS_3R4W 0x00000200 /*!< \brief 3 cycles for read, 4 for write operations. */ +#define MC_FWS_4R4W 0x00000300 /*!< \brief 4 cycles for read and write operations. */ +#define MC_FMCN_MASK 0x00FF0000 /*!< \brief Flash microsecond cycle number mask. */ + +#define MC_FCR_OFF 0x00000064 /*!< \brief MC flash command register offset. */ +#define MC_FCR (MC_BASE + MC_FCR_OFF) /*!< \brief MC flash command register address. */ +#define MC_FCMD_MASK 0x0000000F /*!< \brief Flash command mask. */ +#define MC_FCMD_NOP 0x00000000 /*!< \brief No command. */ +#define MC_FCMD_WP 0x00000001 /*!< \brief Write page. */ +#define MC_FCMD_SLB 0x00000002 /*!< \brief Set lock bit. */ +#define MC_FCMD_WPL 0x00000003 /*!< \brief Write page and lock. */ +#define MC_FCMD_CLB 0x00000004 /*!< \brief Clear lock bit. */ +#define MC_FCMD_EA 0x00000008 /*!< \brief Erase all. */ +#define MC_FCMD_SGPB 0x0000000B /*!< \brief Set general purpose NVM bit. */ +#define MC_FCMD_CGPB 0x0000000D /*!< \brief Clear general purpose NVM bit. */ +#define MC_FCMD_SSB 0x0000000F /*!< \brief Set security bit. */ +#define MC_PAGEN_MASK 0x0003FF00 /*!< \brief Page number mask. */ +#define MC_KEY 0x5A000000 /*!< \brief Writing protect key. */ + +#define MC_FSR_OFF 0x00000068 /*!< \brief MC flash status register offset. */ +#define MC_FSR (MC_BASE + MC_FSR_OFF) /*!< \brief MC flash status register address. */ +#define MC_SECURITY 0x00000010 /*!< \brief Security bit status. */ + + +#endif |