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-rw-r--r--src/target/adi_v5_jtag.c5
-rw-r--r--src/target/arm7_9_common.c27
-rw-r--r--src/target/arm7tdmi.c17
-rw-r--r--src/target/arm920t.c14
-rw-r--r--src/target/arm926ejs.c16
-rw-r--r--src/target/arm966e.c8
-rw-r--r--src/target/arm9tdmi.c16
-rw-r--r--src/target/embeddedice.c22
-rw-r--r--src/target/etm.c10
-rw-r--r--src/target/feroceon.c5
10 files changed, 108 insertions, 32 deletions
diff --git a/src/target/adi_v5_jtag.c b/src/target/adi_v5_jtag.c
index 0a374bea..185bd543 100644
--- a/src/target/adi_v5_jtag.c
+++ b/src/target/adi_v5_jtag.c
@@ -86,8 +86,11 @@ int adi_jtag_dp_scan(struct adiv5_dap *dap,
struct arm_jtag *jtag_info = dap->jtag_info;
struct scan_field fields[2];
uint8_t out_addr_buf;
+ int retval;
- arm_jtag_set_instr(jtag_info, instr, NULL, TAP_IDLE);
+ retval = arm_jtag_set_instr(jtag_info, instr, NULL, TAP_IDLE);
+ if (retval != ERROR_OK)
+ return retval;
/* Scan out a read or write operation using some DP or AP register.
* For APACC access with any sticky error flag set, this is discarded.
diff --git a/src/target/arm7_9_common.c b/src/target/arm7_9_common.c
index b742daeb..abfb21bd 100644
--- a/src/target/arm7_9_common.c
+++ b/src/target/arm7_9_common.c
@@ -690,9 +690,13 @@ int arm7_9_execute_sys_speed(struct target *target)
/* set RESTART instruction */
if (arm7_9->need_bypass_before_restart) {
arm7_9->need_bypass_before_restart = 0;
- arm_jtag_set_instr(jtag_info, 0xf, NULL, TAP_IDLE);
+ retval = arm_jtag_set_instr(jtag_info, 0xf, NULL, TAP_IDLE);
+ if (retval != ERROR_OK)
+ return retval;
}
- arm_jtag_set_instr(jtag_info, 0x4, NULL, TAP_IDLE);
+ retval = arm_jtag_set_instr(jtag_info, 0x4, NULL, TAP_IDLE);
+ if (retval != ERROR_OK)
+ return retval;
long long then = timeval_ms();
int timeout;
@@ -738,13 +742,18 @@ static int arm7_9_execute_fast_sys_speed(struct target *target)
struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
struct arm_jtag *jtag_info = &arm7_9->jtag_info;
struct reg *dbg_stat = &arm7_9->eice_cache->reg_list[EICE_DBG_STAT];
+ int retval;
/* set RESTART instruction */
if (arm7_9->need_bypass_before_restart) {
arm7_9->need_bypass_before_restart = 0;
- arm_jtag_set_instr(jtag_info, 0xf, NULL, TAP_IDLE);
+ retval = arm_jtag_set_instr(jtag_info, 0xf, NULL, TAP_IDLE);
+ if (retval != ERROR_OK)
+ return retval;
}
- arm_jtag_set_instr(jtag_info, 0x4, NULL, TAP_IDLE);
+ retval = arm_jtag_set_instr(jtag_info, 0x4, NULL, TAP_IDLE);
+ if (retval != ERROR_OK)
+ return retval;
if (!set)
{
@@ -1744,13 +1753,19 @@ static int arm7_9_restart_core(struct target *target)
{
struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
struct arm_jtag *jtag_info = &arm7_9->jtag_info;
+ int retval;
/* set RESTART instruction */
if (arm7_9->need_bypass_before_restart) {
arm7_9->need_bypass_before_restart = 0;
- arm_jtag_set_instr(jtag_info, 0xf, NULL, TAP_IDLE);
+
+ retval = arm_jtag_set_instr(jtag_info, 0xf, NULL, TAP_IDLE);
+ if (retval != ERROR_OK)
+ return retval;
}
- arm_jtag_set_instr(jtag_info, 0x4, NULL, TAP_IDLE);
+ retval = arm_jtag_set_instr(jtag_info, 0x4, NULL, TAP_IDLE);
+ if (retval != ERROR_OK)
+ return retval;
jtag_add_runtest(1, TAP_IDLE);
return jtag_execute_queue();
diff --git a/src/target/arm7tdmi.c b/src/target/arm7tdmi.c
index 541adc8e..8befe2bf 100644
--- a/src/target/arm7tdmi.c
+++ b/src/target/arm7tdmi.c
@@ -68,7 +68,9 @@ static int arm7tdmi_examine_debug_reason(struct target *target)
{
return retval;
}
- arm_jtag_set_instr(&arm7_9->jtag_info, arm7_9->jtag_info.intest_instr, NULL, TAP_DRPAUSE);
+ retval = arm_jtag_set_instr(&arm7_9->jtag_info, arm7_9->jtag_info.intest_instr, NULL, TAP_DRPAUSE);
+ if (retval != ERROR_OK)
+ return retval;
jtag_add_dr_scan(arm7_9->jtag_info.tap, 2, fields, TAP_DRPAUSE);
if ((retval = jtag_execute_queue()) != ERROR_OK)
@@ -117,8 +119,11 @@ static __inline int arm7tdmi_clock_out_inner(struct arm_jtag *jtag_info, uint32_
static __inline int arm7tdmi_clock_out(struct arm_jtag *jtag_info,
uint32_t out, uint32_t *deprecated, int breakpoint)
{
+ int retval;
arm_jtag_scann(jtag_info, 0x1, TAP_DRPAUSE);
- arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_DRPAUSE);
+ retval = arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_DRPAUSE);
+ if (retval != ERROR_OK)
+ return retval;
return arm7tdmi_clock_out_inner(jtag_info, out, breakpoint);
}
@@ -133,7 +138,9 @@ static int arm7tdmi_clock_data_in(struct arm_jtag *jtag_info, uint32_t *in)
{
return retval;
}
- arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_DRPAUSE);
+ retval = arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_DRPAUSE);
+ if (retval != ERROR_OK)
+ return retval;
fields[0].num_bits = 1;
fields[0].out_value = NULL;
@@ -217,7 +224,9 @@ static int arm7tdmi_clock_data_in_endianness(struct arm_jtag *jtag_info,
{
return retval;
}
- arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_DRPAUSE);
+ retval = arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_DRPAUSE);
+ if (retval != ERROR_OK)
+ return retval;
fields[0].num_bits = 1;
fields[0].out_value = NULL;
diff --git a/src/target/arm920t.c b/src/target/arm920t.c
index 7627b25e..c5064c11 100644
--- a/src/target/arm920t.c
+++ b/src/target/arm920t.c
@@ -89,11 +89,14 @@ static int arm920t_read_cp15_physical(struct target *target,
uint8_t access_type_buf = 1;
uint8_t reg_addr_buf = reg_addr & 0x3f;
uint8_t nr_w_buf = 0;
+ int retval;
jtag_info = &arm920t->arm7_9_common.jtag_info;
arm_jtag_scann(jtag_info, 0xf, TAP_IDLE);
- arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_IDLE);
+ retval = arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_IDLE);
+ if (retval != ERROR_OK)
+ return retval;
fields[0].num_bits = 1;
fields[0].out_value = &access_type_buf;
@@ -137,13 +140,16 @@ static int arm920t_write_cp15_physical(struct target *target,
uint8_t reg_addr_buf = reg_addr & 0x3f;
uint8_t nr_w_buf = 1;
uint8_t value_buf[4];
+ int retval;
jtag_info = &arm920t->arm7_9_common.jtag_info;
buf_set_u32(value_buf, 0, 32, value);
arm_jtag_scann(jtag_info, 0xf, TAP_IDLE);
- arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_IDLE);
+ retval = arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_IDLE);
+ if (retval != ERROR_OK)
+ return retval;
fields[0].num_bits = 1;
fields[0].out_value = &access_type_buf;
@@ -192,7 +198,9 @@ static int arm920t_execute_cp15(struct target *target, uint32_t cp15_opcode,
jtag_info = &arm920t->arm7_9_common.jtag_info;
arm_jtag_scann(jtag_info, 0xf, TAP_IDLE);
- arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_IDLE);
+ retval = arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_IDLE);
+ if (retval != ERROR_OK)
+ return retval;
buf_set_u32(cp15_opcode_buf, 0, 32, cp15_opcode);
diff --git a/src/target/arm926ejs.c b/src/target/arm926ejs.c
index aa38d27f..3765f231 100644
--- a/src/target/arm926ejs.c
+++ b/src/target/arm926ejs.c
@@ -67,7 +67,9 @@ static int arm926ejs_cp15_read(struct target *target, uint32_t op1, uint32_t op2
{
return retval;
}
- arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_IDLE);
+ retval = arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_IDLE);
+ if (retval != ERROR_OK)
+ return retval;
fields[0].num_bits = 32;
fields[0].out_value = NULL;
@@ -120,7 +122,9 @@ static int arm926ejs_cp15_read(struct target *target, uint32_t op1, uint32_t op2
LOG_DEBUG("addr: 0x%x value: %8.8x", address, *value);
#endif
- arm_jtag_set_instr(jtag_info, 0xc, NULL, TAP_IDLE);
+ retval = arm_jtag_set_instr(jtag_info, 0xc, NULL, TAP_IDLE);
+ if (retval != ERROR_OK)
+ return retval;
return ERROR_OK;
}
@@ -155,7 +159,9 @@ static int arm926ejs_cp15_write(struct target *target, uint32_t op1, uint32_t op
{
return retval;
}
- arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_IDLE);
+ retval = arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_IDLE);
+ if (retval != ERROR_OK)
+ return retval;
fields[0].num_bits = 32;
fields[0].out_value = value_buf;
@@ -205,7 +211,9 @@ static int arm926ejs_cp15_write(struct target *target, uint32_t op1, uint32_t op
LOG_DEBUG("addr: 0x%x value: %8.8x", address, value);
#endif
- arm_jtag_set_instr(jtag_info, 0xf, NULL, TAP_IDLE);
+ retval = arm_jtag_set_instr(jtag_info, 0xf, NULL, TAP_IDLE);
+ if (retval != ERROR_OK)
+ return retval;
return ERROR_OK;
}
diff --git a/src/target/arm966e.c b/src/target/arm966e.c
index b4207c8c..170e3cc5 100644
--- a/src/target/arm966e.c
+++ b/src/target/arm966e.c
@@ -88,7 +88,9 @@ static int arm966e_read_cp15(struct target *target, int reg_addr, uint32_t *valu
{
return retval;
}
- arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_IDLE);
+ retval = arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_IDLE);
+ if (retval != ERROR_OK)
+ return retval;
fields[0].num_bits = 32;
/* REVISIT: table 7-2 shows that bits 31-31 need to be
@@ -142,7 +144,9 @@ int arm966e_write_cp15(struct target *target, int reg_addr, uint32_t value)
{
return retval;
}
- arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_IDLE);
+ retval = arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_IDLE);
+ if (retval != ERROR_OK)
+ return retval;
fields[0].num_bits = 32;
fields[0].out_value = value_buf;
diff --git a/src/target/arm9tdmi.c b/src/target/arm9tdmi.c
index 0749a56e..fd507031 100644
--- a/src/target/arm9tdmi.c
+++ b/src/target/arm9tdmi.c
@@ -103,7 +103,9 @@ int arm9tdmi_examine_debug_reason(struct target *target)
{
return retval;
}
- arm_jtag_set_instr(&arm7_9->jtag_info, arm7_9->jtag_info.intest_instr, NULL, TAP_DRPAUSE);
+ retval = arm_jtag_set_instr(&arm7_9->jtag_info, arm7_9->jtag_info.intest_instr, NULL, TAP_DRPAUSE);
+ if (retval != ERROR_OK)
+ return retval;
jtag_add_dr_scan(arm7_9->jtag_info.tap, 3, fields, TAP_DRPAUSE);
if ((retval = jtag_execute_queue()) != ERROR_OK)
@@ -157,7 +159,9 @@ int arm9tdmi_clock_out(struct arm_jtag *jtag_info, uint32_t instr,
return retval;
}
- arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_DRPAUSE);
+ retval = arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_DRPAUSE);
+ if (retval != ERROR_OK)
+ return retval;
fields[0].num_bits = 32;
fields[0].out_value = out_buf;
@@ -215,7 +219,9 @@ int arm9tdmi_clock_data_in(struct arm_jtag *jtag_info, uint32_t *in)
return retval;
}
- arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_DRPAUSE);
+ retval = arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_DRPAUSE);
+ if (retval != ERROR_OK)
+ return retval;
fields[0].num_bits = 32;
fields[0].out_value = NULL;
@@ -281,7 +287,9 @@ int arm9tdmi_clock_data_in_endianness(struct arm_jtag *jtag_info,
return retval;
}
- arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_DRPAUSE);
+ retval = arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_DRPAUSE);
+ if (retval != ERROR_OK)
+ return retval;
fields[0].num_bits = 32;
fields[0].out_value = NULL;
diff --git a/src/target/embeddedice.c b/src/target/embeddedice.c
index 7ef4ac42..965260ca 100644
--- a/src/target/embeddedice.c
+++ b/src/target/embeddedice.c
@@ -344,10 +344,13 @@ int embeddedice_read_reg_w_check(struct reg *reg,
struct scan_field fields[3];
uint8_t field1_out[1];
uint8_t field2_out[1];
+ int retval;
arm_jtag_scann(ice_reg->jtag_info, 0x2, TAP_IDLE);
- arm_jtag_set_instr(ice_reg->jtag_info, ice_reg->jtag_info->intest_instr, NULL, TAP_IDLE);
+ retval = arm_jtag_set_instr(ice_reg->jtag_info, ice_reg->jtag_info->intest_instr, NULL, TAP_IDLE);
+ if (retval != ERROR_OK)
+ return retval;
/* bits 31:0 -- data (ignored here) */
fields[0].num_bits = 32;
@@ -405,9 +408,12 @@ int embeddedice_receive(struct arm_jtag *jtag_info, uint32_t *data, uint32_t siz
struct scan_field fields[3];
uint8_t field1_out[1];
uint8_t field2_out[1];
+ int retval;
arm_jtag_scann(jtag_info, 0x2, TAP_IDLE);
- arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_IDLE);
+ retval = arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_IDLE);
+ if (retval != ERROR_OK)
+ return retval;
fields[0].num_bits = 32;
fields[0].out_value = NULL;
@@ -487,12 +493,13 @@ static int embeddedice_set_reg_w_exec(struct reg *reg, uint8_t *buf)
void embeddedice_write_reg(struct reg *reg, uint32_t value)
{
struct embeddedice_reg *ice_reg = reg->arch_info;
+ int retval;
LOG_DEBUG("%i: 0x%8.8" PRIx32 "", ice_reg->addr, value);
arm_jtag_scann(ice_reg->jtag_info, 0x2, TAP_IDLE);
- arm_jtag_set_instr(ice_reg->jtag_info, ice_reg->jtag_info->intest_instr, NULL, TAP_IDLE);
+ retval = arm_jtag_set_instr(ice_reg->jtag_info, ice_reg->jtag_info->intest_instr, NULL, TAP_IDLE);
uint8_t reg_addr = ice_reg->addr & 0x1f;
embeddedice_write_reg_inner(ice_reg->jtag_info->tap, reg_addr, value);
@@ -521,9 +528,12 @@ int embeddedice_send(struct arm_jtag *jtag_info, uint32_t *data, uint32_t size)
uint8_t field0_out[4];
uint8_t field1_out[1];
uint8_t field2_out[1];
+ int retval;
arm_jtag_scann(jtag_info, 0x2, TAP_IDLE);
- arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_IDLE);
+ retval = arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_IDLE);
+ if (retval != ERROR_OK)
+ return retval;
fields[0].num_bits = 32;
fields[0].out_value = field0_out;
@@ -575,7 +585,9 @@ int embeddedice_handshake(struct arm_jtag *jtag_info, int hsbit, uint32_t timeou
return ERROR_INVALID_ARGUMENTS;
arm_jtag_scann(jtag_info, 0x2, TAP_IDLE);
- arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_IDLE);
+ retval = arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_IDLE);
+ if (retval != ERROR_OK)
+ return retval;
fields[0].num_bits = 32;
fields[0].out_value = NULL;
diff --git a/src/target/etm.c b/src/target/etm.c
index 61ee99a0..5c42fb59 100644
--- a/src/target/etm.c
+++ b/src/target/etm.c
@@ -496,6 +496,7 @@ static int etm_read_reg_w_check(struct reg *reg,
const struct etm_reg_info *r = etm_reg->reg_info;
uint8_t reg_addr = r->addr & 0x7f;
struct scan_field fields[3];
+ int retval;
if (etm_reg->reg_info->mode == WO) {
LOG_ERROR("BUG: can't read write-only register %s", r->name);
@@ -505,7 +506,9 @@ static int etm_read_reg_w_check(struct reg *reg,
LOG_DEBUG("%s (%u)", r->name, reg_addr);
arm_jtag_scann(etm_reg->jtag_info, 0x6, TAP_IDLE);
- arm_jtag_set_instr(etm_reg->jtag_info, etm_reg->jtag_info->intest_instr, NULL, TAP_IDLE);
+ retval = arm_jtag_set_instr(etm_reg->jtag_info, etm_reg->jtag_info->intest_instr, NULL, TAP_IDLE);
+ if (retval != ERROR_OK)
+ return retval;
fields[0].num_bits = 32;
fields[0].out_value = reg->value;
@@ -577,6 +580,7 @@ static int etm_write_reg(struct reg *reg, uint32_t value)
const struct etm_reg_info *r = etm_reg->reg_info;
uint8_t reg_addr = r->addr & 0x7f;
struct scan_field fields[3];
+ int retval;
if (etm_reg->reg_info->mode == RO) {
LOG_ERROR("BUG: can't write read--only register %s", r->name);
@@ -586,7 +590,9 @@ static int etm_write_reg(struct reg *reg, uint32_t value)
LOG_DEBUG("%s (%u): 0x%8.8" PRIx32 "", r->name, reg_addr, value);
arm_jtag_scann(etm_reg->jtag_info, 0x6, TAP_IDLE);
- arm_jtag_set_instr(etm_reg->jtag_info, etm_reg->jtag_info->intest_instr, NULL, TAP_IDLE);
+ retval = arm_jtag_set_instr(etm_reg->jtag_info, etm_reg->jtag_info->intest_instr, NULL, TAP_IDLE);
+ if (retval != ERROR_OK)
+ return retval;
fields[0].num_bits = 32;
uint8_t tmp1[4];
diff --git a/src/target/feroceon.c b/src/target/feroceon.c
index ea22ca00..6ca432a8 100644
--- a/src/target/feroceon.c
+++ b/src/target/feroceon.c
@@ -78,6 +78,7 @@ static int feroceon_dummy_clock_out(struct arm_jtag *jtag_info, uint32_t instr)
uint8_t out_buf[4];
uint8_t instr_buf[4];
uint8_t sysspeed_buf = 0x0;
+ int retval;
/* prepare buffer */
buf_set_u32(out_buf, 0, 32, 0);
@@ -86,7 +87,9 @@ static int feroceon_dummy_clock_out(struct arm_jtag *jtag_info, uint32_t instr)
arm_jtag_scann(jtag_info, 0x1, TAP_DRPAUSE);
- arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_DRPAUSE);
+ retval = arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_DRPAUSE);
+ if (retval != ERROR_OK)
+ return retval;
fields[0].num_bits = 32;
fields[0].out_value = out_buf;
generated by cgit v1.2.3 (git 2.46.0) at 2024-12-23 15:24:09 +0000