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-rw-r--r--src/target/armv4_5.c7
-rw-r--r--src/target/embeddedice.c2
2 files changed, 8 insertions, 1 deletions
diff --git a/src/target/armv4_5.c b/src/target/armv4_5.c
index dc42d1c0..2d73a534 100644
--- a/src/target/armv4_5.c
+++ b/src/target/armv4_5.c
@@ -257,6 +257,13 @@ int armv4_5_set_core_reg(reg_t *reg, u8 *buf)
armv4_5_target->core_state = ARMV4_5_STATE_ARM;
}
}
+
+ if (armv4_5_target->core_mode != (value & 0x1f))
+ {
+ DEBUG("changing ARM core mode to '%s'", armv4_5_mode_strings[armv4_5_mode_to_number(value & 0x1f)]);
+ armv4_5_target->core_mode = value & 0x1f;
+ armv4_5_target->write_core_reg(target, 16, ARMV4_5_MODE_ANY, value);
+ }
}
buf_set_u32(reg->value, 0, 32, value);
diff --git a/src/target/embeddedice.c b/src/target/embeddedice.c
index b7e14b61..699aa96f 100644
--- a/src/target/embeddedice.c
+++ b/src/target/embeddedice.c
@@ -178,7 +178,7 @@ reg_cache_t* embeddedice_build_reg_cache(target_t *target, arm7_9_common_t *arm7
arm7_9->has_monitor_mode = 1;
break;
default:
- ERROR("unknown EmbeddedICE version (comms ctrl: 0x%4.4x)", buf_get_u32(reg_list[EICE_COMMS_CTRL].value, 0, 32));
+ ERROR("unknown EmbeddedICE version (comms ctrl: 0x%8.8x)", buf_get_u32(reg_list[EICE_COMMS_CTRL].value, 0, 32));
}
return reg_cache;