diff options
Diffstat (limited to 'src/target')
-rw-r--r-- | src/target/arm11_dbgtap.c | 4 | ||||
-rw-r--r-- | src/target/arm7_9_common.c | 2 | ||||
-rw-r--r-- | src/target/arm_adi_v5.c | 4 | ||||
-rw-r--r-- | src/target/avrt.c | 4 | ||||
-rw-r--r-- | src/target/xscale.c | 14 |
5 files changed, 14 insertions, 14 deletions
diff --git a/src/target/arm11_dbgtap.c b/src/target/arm11_dbgtap.c index 3a5c1dda..025c69e8 100644 --- a/src/target/arm11_dbgtap.c +++ b/src/target/arm11_dbgtap.c @@ -439,7 +439,7 @@ int arm11_run_instr_data_to_core(arm11_common_t * arm11, u32 opcode, u32 * data, { Data = *data; - arm11_add_dr_scan_vc(asizeof(chain5_fields), chain5_fields, TAP_IDLE); + arm11_add_dr_scan_vc(asizeof(chain5_fields), chain5_fields, jtag_add_end_state(TAP_IDLE)); CHECK_RETVAL(jtag_execute_queue()); @@ -532,7 +532,7 @@ int arm11_run_instr_data_to_core_noack(arm11_common_t * arm11, u32 opcode, u32 * } else { - jtag_add_dr_scan(asizeof(chain5_fields), chain5_fields, TAP_IDLE); + jtag_add_dr_scan(asizeof(chain5_fields), chain5_fields, jtag_add_end_state(TAP_IDLE)); } } diff --git a/src/target/arm7_9_common.c b/src/target/arm7_9_common.c index 9751c213..7e9a3185 100644 --- a/src/target/arm7_9_common.c +++ b/src/target/arm7_9_common.c @@ -1731,7 +1731,7 @@ int arm7_9_restart_core(struct target_s *target) } arm_jtag_set_instr(jtag_info, 0x4, NULL); - jtag_add_runtest(1, TAP_IDLE); + jtag_add_runtest(1, jtag_add_end_state(TAP_IDLE)); return jtag_execute_queue(); } diff --git a/src/target/arm_adi_v5.c b/src/target/arm_adi_v5.c index 5bfd4c76..177a43b0 100644 --- a/src/target/arm_adi_v5.c +++ b/src/target/arm_adi_v5.c @@ -70,7 +70,7 @@ int adi_jtag_dp_scan(swjdp_common_t *swjdp, u8 instr, u8 reg_addr, u8 RnW, u8 *o /* Add specified number of tck clocks before accessing memory bus */ if ((instr == DAP_IR_APACC) && ((reg_addr == AP_REG_DRW)||((reg_addr&0xF0) == AP_REG_BD0) )&& (swjdp->memaccess_tck != 0)) - jtag_add_runtest(swjdp->memaccess_tck, TAP_IDLE); + jtag_add_runtest(swjdp->memaccess_tck, jtag_add_end_state(TAP_IDLE)); fields[0].tap = jtag_info->tap; fields[0].num_bits = 3; @@ -101,7 +101,7 @@ int adi_jtag_dp_scan_u32(swjdp_common_t *swjdp, u8 instr, u8 reg_addr, u8 RnW, u /* Add specified number of tck clocks before accessing memory bus */ if ((instr == DAP_IR_APACC) && ((reg_addr == AP_REG_DRW)||((reg_addr&0xF0) == AP_REG_BD0) )&& (swjdp->memaccess_tck != 0)) - jtag_add_runtest(swjdp->memaccess_tck, TAP_IDLE); + jtag_add_runtest(swjdp->memaccess_tck, jtag_add_end_state(TAP_IDLE)); fields[0].tap = jtag_info->tap; fields[0].num_bits = 3; diff --git a/src/target/avrt.c b/src/target/avrt.c index a0b27113..e0f1d3c7 100644 --- a/src/target/avrt.c +++ b/src/target/avrt.c @@ -218,7 +218,7 @@ int mcu_write_ir(jtag_tap_t *tap, u8 *ir_in, u8 *ir_out, int ir_len, int rti) field[0].num_bits = tap->ir_length; field[0].out_value = ir_out; field[0].in_value = ir_in; - jtag_add_plain_ir_scan(sizeof(field) / sizeof(field[0]), field, TAP_IDLE); + jtag_add_plain_ir_scan(sizeof(field) / sizeof(field[0]), field, jtag_add_end_state(TAP_IDLE)); } return ERROR_OK; @@ -239,7 +239,7 @@ int mcu_write_dr(jtag_tap_t *tap, u8 *dr_in, u8 *dr_out, int dr_len, int rti) field[0].num_bits = dr_len; field[0].out_value = dr_out; field[0].in_value = dr_in; - jtag_add_plain_dr_scan(sizeof(field) / sizeof(field[0]), field, TAP_IDLE); + jtag_add_plain_dr_scan(sizeof(field) / sizeof(field[0]), field, jtag_add_end_state(TAP_IDLE)); } return ERROR_OK; diff --git a/src/target/xscale.c b/src/target/xscale.c index 1e0b7756..3f0a055a 100644 --- a/src/target/xscale.c +++ b/src/target/xscale.c @@ -363,7 +363,7 @@ int xscale_receive(target_t *target, u32 *buffer, int num_words) fields[1].in_value = (u8 *)(field1+i); - jtag_add_dr_scan_check(3, fields, TAP_IDLE); + jtag_add_dr_scan_check(3, fields, jtag_add_end_state(TAP_IDLE)); jtag_add_callback(xscale_getbuf, (u8 *)(field1+i)); @@ -477,7 +477,7 @@ int xscale_read_tx(target_t *target, int consume) jtag_add_pathmove(sizeof(noconsume_path)/sizeof(*noconsume_path), noconsume_path); } - jtag_add_dr_scan(3, fields, TAP_IDLE); + jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_IDLE)); jtag_check_value_mask(fields+0, &field0_check_value, &field0_check_mask); jtag_check_value_mask(fields+2, &field2_check_value, &field2_check_mask); @@ -560,7 +560,7 @@ int xscale_write_rx(target_t *target) LOG_DEBUG("polling RX"); for (;;) { - jtag_add_dr_scan(3, fields, TAP_IDLE); + jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_IDLE)); jtag_check_value_mask(fields+0, &field0_check_value, &field0_check_mask); jtag_check_value_mask(fields+2, &field2_check_value, &field2_check_mask); @@ -592,7 +592,7 @@ int xscale_write_rx(target_t *target) /* set rx_valid */ field2 = 0x1; - jtag_add_dr_scan(3, fields, TAP_IDLE); + jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_IDLE)); if ((retval = jtag_execute_queue()) != ERROR_OK) { @@ -658,7 +658,7 @@ int xscale_send(target_t *target, u8 *buffer, int count, int size) 3, bits, t, - TAP_IDLE); + jtag_add_end_state(TAP_IDLE)); buffer += size; } @@ -1646,7 +1646,7 @@ int xscale_deassert_reset(target_t *target) /* wait 300ms; 150 and 100ms were not enough */ jtag_add_sleep(300*1000); - jtag_add_runtest(2030, TAP_IDLE); + jtag_add_runtest(2030, jtag_add_end_state(TAP_IDLE)); jtag_execute_queue(); /* set Hold reset, Halt mode and Trap Reset */ @@ -1709,7 +1709,7 @@ int xscale_deassert_reset(target_t *target) xscale_load_ic(target, 1, 0x0, xscale->low_vectors); xscale_load_ic(target, 1, 0xffff0000, xscale->high_vectors); - jtag_add_runtest(30, TAP_IDLE); + jtag_add_runtest(30, jtag_add_end_state(TAP_IDLE)); jtag_add_sleep(100000); |