1 files changed, 0 insertions, 62 deletions
diff --git a/src/tcl/target/imx31.cfg b/src/tcl/target/imx31.cfg
deleted file mode 100644
index 3fed2f82..00000000
--- a/src/tcl/target/imx31.cfg
+++ /dev/null
@@ -1,62 +0,0 @@
-# imx31 config
-#
-
-reset_config trst_and_srst
-
-if { [info exists CHIPNAME] } {	
-   set  _CHIPNAME $CHIPNAME    
-} else {	 
-   set  _CHIPNAME imx31
-}
-
-if { [info exists ENDIAN] } {	
-   set  _ENDIAN $ENDIAN    
-} else {	 
-   set  _ENDIAN little
-}
-
-if { [info exists CPUTAPID ] } {
-   set _CPUTAPID $CPUTAPID
-} else {
-   set _CPUTAPID 0x07b3601d
-}
-
-if { [info exists SDMATAPID ] } {
-   set _SDMATAPID $SDMATAPID
-} else {
-   set _SDMATAPID 0x2190101d
-}
-
-#========================================
-# The "system jtag controller" 
-# IMX31 reference manual, page 6-28 - figure 6-14
-if { [info exists SJCTAPID ] } {
-   set _SJCTAPID $SJCTAPID
-} else {
-   set _SJCTAPID 0x2b900f0f
-}
-jtag newtap $_CHIPNAME sjc -irlen 4 -ircapture 0x0 -irmask 0x0 -expected-id $_SJCTAPID
-
-# The "SDMA" - <S>mart <DMA> controller debug tap
-# Based on some IO pins - this can be disabled & removed
-# See diagram: 6-14
-#   SIGNAL NAME:
-#    SJC_MOD - controls multiplexer - disables ARM1136
-#    SDMA_BYPASS - disables SDMA    - 
-#  
-# Per ARM: DDI0211J_arm1136_r1p5_trm.pdf - the ARM 1136 as a 5 bit IR register
-jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_CPUTAPID
-
-# No IDCODE for this TAP
-jtag newtap $_CHIPNAME whatchacallit -irlen 4 -ircapture 0 -irmask 0xf -expected-id 0x0
-
-# Per section 40.17.1, table 40-85 the IR register is 4 bits
-# But this conflicts with Diagram 6-13, "3bits ir and drs"
-jtag newtap $_CHIPNAME smda -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_SDMATAPID
-
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
-target create $_TARGETNAME arm11 -endian $_ENDIAN -chain-position $_TARGETNAME
-
-
-proc power_restore {} { puts "Sensed power restore. No action." } 
-proc srst_deasserted {} { puts "Sensed nSRST deasserted. No action." }