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-rw-r--r--src/flash/str9xpec.c10
-rw-r--r--src/jtag/jtag.c7
-rw-r--r--src/jtag/jtag.h9
-rw-r--r--src/jtag/zy1000.c2
-rw-r--r--src/target/arm11.h2
-rw-r--r--src/target/arm720t.c6
-rw-r--r--src/target/arm7tdmi.c12
-rw-r--r--src/target/arm920t.c8
-rw-r--r--src/target/arm926ejs.c8
-rw-r--r--src/target/arm966e.c6
-rw-r--r--src/target/arm9tdmi.c14
-rw-r--r--src/target/arm_adi_v5.c6
-rw-r--r--src/target/arm_jtag.c6
-rw-r--r--src/target/embeddedice.c14
-rw-r--r--src/target/embeddedice.h2
-rw-r--r--src/target/etb.c12
-rw-r--r--src/target/etm.c6
-rw-r--r--src/target/feroceon.c4
-rw-r--r--src/target/mips_ejtag.c8
-rw-r--r--src/target/xscale.c16
20 files changed, 85 insertions, 73 deletions
diff --git a/src/flash/str9xpec.c b/src/flash/str9xpec.c
index d50efccc..947903b3 100644
--- a/src/flash/str9xpec.c
+++ b/src/flash/str9xpec.c
@@ -539,7 +539,7 @@ static int str9xpec_lock_device(struct flash_bank_s *bank)
field.out_value = NULL;
field.in_value = &status;
- jtag_add_dr_scan(1, &field, jtag_add_end_state(TAP_INVALID));
+ jtag_add_dr_scan(1, &field, jtag_get_end_state());
jtag_execute_queue();
} while(!(status & ISC_STATUS_BUSY));
@@ -620,7 +620,7 @@ static int str9xpec_set_address(struct flash_bank_s *bank, u8 sector)
field.out_value = &sector;
field.in_value = NULL;
- jtag_add_dr_scan(1, &field, jtag_add_end_state(TAP_INVALID));
+ jtag_add_dr_scan(1, &field, jtag_get_end_state());
return ERROR_OK;
}
@@ -717,7 +717,7 @@ static int str9xpec_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32
field.out_value = NULL;
field.in_value = scanbuf;
- jtag_add_dr_scan(1, &field, jtag_add_end_state(TAP_INVALID));
+ jtag_add_dr_scan(1, &field, jtag_get_end_state());
jtag_execute_queue();
status = buf_get_u32(scanbuf, 0, 8);
@@ -767,7 +767,7 @@ static int str9xpec_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32
field.out_value = NULL;
field.in_value = scanbuf;
- jtag_add_dr_scan(1, &field, jtag_add_end_state(TAP_INVALID));
+ jtag_add_dr_scan(1, &field, jtag_get_end_state());
jtag_execute_queue();
status = buf_get_u32(scanbuf, 0, 8);
@@ -959,7 +959,7 @@ static int str9xpec_write_options(struct flash_bank_s *bank)
field.out_value = NULL;
field.in_value = &status;
- jtag_add_dr_scan(1, &field, jtag_add_end_state(TAP_INVALID));
+ jtag_add_dr_scan(1, &field, jtag_get_end_state());
jtag_execute_queue();
} while(!(status & ISC_STATUS_BUSY));
diff --git a/src/jtag/jtag.c b/src/jtag/jtag.c
index 263b7665..a2c94c40 100644
--- a/src/jtag/jtag.c
+++ b/src/jtag/jtag.c
@@ -783,6 +783,11 @@ tap_state_t jtag_add_end_state(tap_state_t state)
return cmd_queue_end_state;
}
+tap_state_t jtag_get_end_state(void)
+{
+ return cmd_queue_end_state;
+}
+
void jtag_add_sleep(u32 us)
{
keep_alive(); /* we might be running on a very slow JTAG clk */
@@ -2226,7 +2231,7 @@ static int handle_runtest_command(struct command_context_s *cmd_ctx, char *cmd,
return ERROR_COMMAND_SYNTAX_ERROR;
}
- jtag_add_runtest(strtol(args[0], NULL, 0), jtag_add_end_state(TAP_INVALID));
+ jtag_add_runtest(strtol(args[0], NULL, 0), jtag_get_end_state());
jtag_execute_queue();
return ERROR_OK;
diff --git a/src/jtag/jtag.h b/src/jtag/jtag.h
index 67b3b55c..552e217c 100644
--- a/src/jtag/jtag.h
+++ b/src/jtag/jtag.h
@@ -488,7 +488,7 @@ extern void jtag_add_reset(int req_tlr_or_trst, int srst);
/**
- * Function jtag_add_stable_clocks
+ * Function jtag_add_end_state
*
* Set a global variable to \a state if \a state != TAP_INVALID.
*
@@ -496,6 +496,13 @@ extern void jtag_add_reset(int req_tlr_or_trst, int srst);
*
**/
extern tap_state_t jtag_add_end_state(tap_state_t state);
+/**
+ * Function jtag_get_end_state
+ *
+ * Return the value of the global variable for end state
+ *
+ **/
+extern tap_state_t jtag_get_end_state(void);
extern void jtag_add_sleep(u32 us);
diff --git a/src/jtag/zy1000.c b/src/jtag/zy1000.c
index 1fc2479e..87b2c9ea 100644
--- a/src/jtag/zy1000.c
+++ b/src/jtag/zy1000.c
@@ -748,7 +748,7 @@ int interface_jtag_add_pathmove(int num_states, const tap_state_t *path)
void embeddedice_write_dcc(jtag_tap_t *tap, int reg_addr, u8 *buffer, int little, int count)
{
// static int const reg_addr=0x5;
- tap_state_t end_state=jtag_add_end_state(TAP_INVALID);
+ tap_state_t end_state=jtag_get_end_state();
if (jtag_NextEnabledTap(jtag_NextEnabledTap(NULL))==NULL)
{
/* better performance via code duplication */
diff --git a/src/target/arm11.h b/src/target/arm11.h
index b20b2cc6..5e34f8dd 100644
--- a/src/target/arm11.h
+++ b/src/target/arm11.h
@@ -47,7 +47,7 @@
23 * ARM11_REGCACHE_MODEREGS + \
9 * ARM11_REGCACHE_FREGS)
-#define ARM11_TAP_DEFAULT jtag_add_end_state(TAP_INVALID)
+#define ARM11_TAP_DEFAULT jtag_get_end_state()
#define CHECK_RETVAL(action) \
diff --git a/src/target/arm720t.c b/src/target/arm720t.c
index dba725a8..24eee6c6 100644
--- a/src/target/arm720t.c
+++ b/src/target/arm720t.c
@@ -119,15 +119,15 @@ int arm720t_scan_cp15(target_t *target, u32 out, u32 *in, int instruction, int c
if (in)
{
fields[1].in_value = (u8 *)in;
- jtag_add_dr_scan(2, fields, jtag_add_end_state(TAP_INVALID));
+ jtag_add_dr_scan(2, fields, jtag_get_end_state());
jtag_add_callback(arm7flip32, (u8 *)in);
} else
{
- jtag_add_dr_scan(2, fields, jtag_add_end_state(TAP_INVALID));
+ jtag_add_dr_scan(2, fields, jtag_get_end_state());
}
if (clock)
- jtag_add_runtest(0, jtag_add_end_state(TAP_INVALID));
+ jtag_add_runtest(0, jtag_get_end_state());
#ifdef _DEBUG_INSTRUCTION_EXECUTION_
if((retval = jtag_execute_queue()) != ERROR_OK)
diff --git a/src/target/arm7tdmi.c b/src/target/arm7tdmi.c
index e3185bec..28bfb154 100644
--- a/src/target/arm7tdmi.c
+++ b/src/target/arm7tdmi.c
@@ -147,9 +147,9 @@ static __inline int arm7tdmi_clock_out_inner(arm_jtag_t *jtag_info, u32 out, int
2,
arm7tdmi_num_bits,
values,
- jtag_add_end_state(TAP_INVALID));
+ jtag_get_end_state());
- jtag_add_runtest(0, jtag_add_end_state(TAP_INVALID));
+ jtag_add_runtest(0, jtag_get_end_state());
return ERROR_OK;
}
@@ -187,11 +187,11 @@ int arm7tdmi_clock_data_in(arm_jtag_t *jtag_info, u32 *in)
fields[1].out_value = NULL;
fields[1].in_value = (u8 *)in;
- jtag_add_dr_scan(2, fields, jtag_add_end_state(TAP_INVALID));
+ jtag_add_dr_scan(2, fields, jtag_get_end_state());
jtag_add_callback(arm7flip32, (u8 *)in);
- jtag_add_runtest(0, jtag_add_end_state(TAP_INVALID));
+ jtag_add_runtest(0, jtag_get_end_state());
#ifdef _DEBUG_INSTRUCTION_EXECUTION_
{
@@ -277,11 +277,11 @@ int arm7tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size,
fields[1].out_value = NULL;
jtag_alloc_in_value32(&fields[1]);
- jtag_add_dr_scan(2, fields, jtag_add_end_state(TAP_INVALID));
+ jtag_add_dr_scan(2, fields, jtag_get_end_state());
jtag_add_callback4(arm7endianness, in, (jtag_callback_data_t)size, (jtag_callback_data_t)be, (jtag_callback_data_t)fields[1].in_value);
- jtag_add_runtest(0, jtag_add_end_state(TAP_INVALID));
+ jtag_add_runtest(0, jtag_get_end_state());
#ifdef _DEBUG_INSTRUCTION_EXECUTION_
{
diff --git a/src/target/arm920t.c b/src/target/arm920t.c
index 741a0502..22300115 100644
--- a/src/target/arm920t.c
+++ b/src/target/arm920t.c
@@ -127,11 +127,11 @@ int arm920t_read_cp15_physical(target_t *target, int reg_addr, u32 *value)
fields[3].out_value = &nr_w_buf;
fields[3].in_value = NULL;
- jtag_add_dr_scan(4, fields, jtag_add_end_state(TAP_INVALID));
+ jtag_add_dr_scan(4, fields, jtag_get_end_state());
fields[1].in_value = (u8 *)value;
- jtag_add_dr_scan(4, fields, jtag_add_end_state(TAP_INVALID));
+ jtag_add_dr_scan(4, fields, jtag_get_end_state());
jtag_add_callback(arm_le_to_h_u32, (u8 *)value);
@@ -180,7 +180,7 @@ int arm920t_write_cp15_physical(target_t *target, int reg_addr, u32 value)
fields[3].out_value = &nr_w_buf;
fields[3].in_value = NULL;
- jtag_add_dr_scan(4, fields, jtag_add_end_state(TAP_INVALID));
+ jtag_add_dr_scan(4, fields, jtag_get_end_state());
#ifdef _DEBUG_INSTRUCTION_EXECUTION_
LOG_DEBUG("addr: 0x%x value: %8.8x", reg_addr, value);
@@ -227,7 +227,7 @@ int arm920t_execute_cp15(target_t *target, u32 cp15_opcode, u32 arm_opcode)
fields[3].out_value = &nr_w_buf;
fields[3].in_value = NULL;
- jtag_add_dr_scan(4, fields, jtag_add_end_state(TAP_INVALID));
+ jtag_add_dr_scan(4, fields, jtag_get_end_state());
arm9tdmi_clock_out(jtag_info, arm_opcode, 0, NULL, 0);
arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 1);
diff --git a/src/target/arm926ejs.c b/src/target/arm926ejs.c
index 03c92f18..1c5b1256 100644
--- a/src/target/arm926ejs.c
+++ b/src/target/arm926ejs.c
@@ -157,7 +157,7 @@ int arm926ejs_cp15_read(target_t *target, u32 op1, u32 op2, u32 CRn, u32 CRm, u3
fields[3].out_value = &nr_w_buf;
fields[3].in_value = NULL;
- jtag_add_dr_scan(4, fields, jtag_add_end_state(TAP_INVALID));
+ jtag_add_dr_scan(4, fields, jtag_get_end_state());
/*TODO: add timeout*/
do
@@ -165,7 +165,7 @@ int arm926ejs_cp15_read(target_t *target, u32 op1, u32 op2, u32 CRn, u32 CRm, u3
/* rescan with NOP, to wait for the access to complete */
access = 0;
nr_w_buf = 0;
- jtag_add_dr_scan(4, fields, jtag_add_end_state(TAP_INVALID));
+ jtag_add_dr_scan(4, fields, jtag_get_end_state());
jtag_add_callback(arm_le_to_h_u32, (u8 *)value);
@@ -227,14 +227,14 @@ int arm926ejs_cp15_write(target_t *target, u32 op1, u32 op2, u32 CRn, u32 CRm, u
fields[3].out_value = &nr_w_buf;
fields[3].in_value = NULL;
- jtag_add_dr_scan(4, fields, jtag_add_end_state(TAP_INVALID));
+ jtag_add_dr_scan(4, fields, jtag_get_end_state());
/*TODO: add timeout*/
do
{
/* rescan with NOP, to wait for the access to complete */
access = 0;
nr_w_buf = 0;
- jtag_add_dr_scan(4, fields, jtag_add_end_state(TAP_INVALID));
+ jtag_add_dr_scan(4, fields, jtag_get_end_state());
if ((retval = jtag_execute_queue()) != ERROR_OK)
{
return retval;
diff --git a/src/target/arm966e.c b/src/target/arm966e.c
index 58c99c02..269b7138 100644
--- a/src/target/arm966e.c
+++ b/src/target/arm966e.c
@@ -189,11 +189,11 @@ int arm966e_read_cp15(target_t *target, int reg_addr, u32 *value)
fields[2].out_value = &nr_w_buf;
fields[2].in_value = NULL;
- jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID));
+ jtag_add_dr_scan(3, fields, jtag_get_end_state());
fields[1].in_value = (u8 *)value;
- jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID));
+ jtag_add_dr_scan(3, fields, jtag_get_end_state());
jtag_add_callback(arm_le_to_h_u32, (u8 *)value);
@@ -244,7 +244,7 @@ int arm966e_write_cp15(target_t *target, int reg_addr, u32 value)
fields[2].out_value = &nr_w_buf;
fields[2].in_value = NULL;
- jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID));
+ jtag_add_dr_scan(3, fields, jtag_get_end_state());
#ifdef _DEBUG_INSTRUCTION_EXECUTION_
LOG_DEBUG("addr: 0x%x value: %8.8x", reg_addr, value);
diff --git a/src/target/arm9tdmi.c b/src/target/arm9tdmi.c
index c4f7e08f..06f9fa31 100644
--- a/src/target/arm9tdmi.c
+++ b/src/target/arm9tdmi.c
@@ -204,16 +204,16 @@ int arm9tdmi_clock_out(arm_jtag_t *jtag_info, u32 instr, u32 out, u32 *in, int s
if (in)
{
fields[0].in_value=(u8 *)in;
- jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID));
+ jtag_add_dr_scan(3, fields, jtag_get_end_state());
jtag_add_callback(arm_le_to_h_u32, (u8 *)in);
}
else
{
- jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID));
+ jtag_add_dr_scan(3, fields, jtag_get_end_state());
}
- jtag_add_runtest(0, jtag_add_end_state(TAP_INVALID));
+ jtag_add_runtest(0, jtag_get_end_state());
#ifdef _DEBUG_INSTRUCTION_EXECUTION_
{
@@ -263,11 +263,11 @@ int arm9tdmi_clock_data_in(arm_jtag_t *jtag_info, u32 *in)
fields[2].out_value = NULL;
fields[2].in_value = NULL;
- jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID));
+ jtag_add_dr_scan(3, fields, jtag_get_end_state());
jtag_add_callback(arm_le_to_h_u32, (u8 *)in);
- jtag_add_runtest(0, jtag_add_end_state(TAP_INVALID));
+ jtag_add_runtest(0, jtag_get_end_state());
#ifdef _DEBUG_INSTRUCTION_EXECUTION_
{
@@ -330,11 +330,11 @@ int arm9tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size,
fields[2].out_value = NULL;
fields[2].in_value = NULL;
- jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID));
+ jtag_add_dr_scan(3, fields, jtag_get_end_state());
jtag_add_callback4(arm9endianness, in, (jtag_callback_data_t)size, (jtag_callback_data_t)be, (jtag_callback_data_t)fields[0].in_value);
- jtag_add_runtest(0, jtag_add_end_state(TAP_INVALID));
+ jtag_add_runtest(0, jtag_get_end_state());
#ifdef _DEBUG_INSTRUCTION_EXECUTION_
{
diff --git a/src/target/arm_adi_v5.c b/src/target/arm_adi_v5.c
index 177a43b0..7dc5aa1f 100644
--- a/src/target/arm_adi_v5.c
+++ b/src/target/arm_adi_v5.c
@@ -83,7 +83,7 @@ int adi_jtag_dp_scan(swjdp_common_t *swjdp, u8 instr, u8 reg_addr, u8 RnW, u8 *o
fields[1].out_value = outvalue;
fields[1].in_value = invalue;
- jtag_add_dr_scan(2, fields, jtag_add_end_state(TAP_INVALID));
+ jtag_add_dr_scan(2, fields, jtag_get_end_state());
return ERROR_OK;
}
@@ -118,13 +118,13 @@ int adi_jtag_dp_scan_u32(swjdp_common_t *swjdp, u8 instr, u8 reg_addr, u8 RnW, u
if (invalue)
{
fields[1].in_value = (u8 *)invalue;
- jtag_add_dr_scan(2, fields, jtag_add_end_state(TAP_INVALID));
+ jtag_add_dr_scan(2, fields, jtag_get_end_state());
jtag_add_callback(arm_le_to_h_u32, (u8 *)invalue);
} else
{
- jtag_add_dr_scan(2, fields, jtag_add_end_state(TAP_INVALID));
+ jtag_add_dr_scan(2, fields, jtag_get_end_state());
}
return ERROR_OK;
diff --git a/src/target/arm_jtag.c b/src/target/arm_jtag.c
index 90437f29..46539c19 100644
--- a/src/target/arm_jtag.c
+++ b/src/target/arm_jtag.c
@@ -53,13 +53,13 @@ int arm_jtag_set_instr(arm_jtag_t *jtag_info, u32 new_instr, void *no_verify_ca
if (no_verify_capture==NULL)
{
- jtag_add_ir_scan(1, &field, jtag_add_end_state(TAP_INVALID));
+ jtag_add_ir_scan(1, &field, jtag_get_end_state());
} else
{
/* FIX!!!! this is a kludge!!! arm926ejs.c should reimplement this arm_jtag_set_instr to
* have special verification code.
*/
- jtag_add_ir_scan_noverify(1, &field, jtag_add_end_state(TAP_INVALID));
+ jtag_add_ir_scan_noverify(1, &field, jtag_get_end_state());
}
}
@@ -86,7 +86,7 @@ int arm_jtag_scann(arm_jtag_t *jtag_info, u32 new_scan_chain)
1,
num_bits,
values,
- jtag_add_end_state(TAP_INVALID));
+ jtag_get_end_state());
jtag_info->cur_scan_chain = new_scan_chain;
}
diff --git a/src/target/embeddedice.c b/src/target/embeddedice.c
index 0abcb733..96b653e2 100644
--- a/src/target/embeddedice.c
+++ b/src/target/embeddedice.c
@@ -266,7 +266,7 @@ int embeddedice_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask)
fields[2].check_value = NULL;
fields[2].check_mask = NULL;
- jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID));
+ jtag_add_dr_scan(3, fields, jtag_get_end_state());
fields[0].in_value = reg->value;
fields[0].check_value = check_value;
@@ -278,7 +278,7 @@ int embeddedice_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask)
*/
buf_set_u32(fields[1].out_value, 0, 5, embeddedice_reg_arch_info[EICE_COMMS_CTRL]);
- jtag_add_dr_scan_check(3, fields, jtag_add_end_state(TAP_INVALID));
+ jtag_add_dr_scan_check(3, fields, jtag_get_end_state());
return ERROR_OK;
}
@@ -314,7 +314,7 @@ int embeddedice_receive(arm_jtag_t *jtag_info, u32 *data, u32 size)
buf_set_u32(fields[2].out_value, 0, 1, 0);
fields[2].in_value = NULL;
- jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID));
+ jtag_add_dr_scan(3, fields, jtag_get_end_state());
while (size > 0)
{
@@ -325,7 +325,7 @@ int embeddedice_receive(arm_jtag_t *jtag_info, u32 *data, u32 size)
buf_set_u32(fields[1].out_value, 0, 5, embeddedice_reg_arch_info[EICE_COMMS_CTRL]);
fields[0].in_value = (u8 *)data;
- jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID));
+ jtag_add_dr_scan(3, fields, jtag_get_end_state());
jtag_add_callback(arm_le_to_h_u32, (u8 *)data);
data++;
@@ -420,7 +420,7 @@ int embeddedice_send(arm_jtag_t *jtag_info, u32 *data, u32 size)
while (size > 0)
{
buf_set_u32(fields[0].out_value, 0, 32, *data);
- jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID));
+ jtag_add_dr_scan(3, fields, jtag_get_end_state());
data++;
size--;
@@ -471,11 +471,11 @@ int embeddedice_handshake(arm_jtag_t *jtag_info, int hsbit, u32 timeout)
buf_set_u32(fields[2].out_value, 0, 1, 0);
fields[2].in_value = NULL;
- jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID));
+ jtag_add_dr_scan(3, fields, jtag_get_end_state());
gettimeofday(&lap, NULL);
do
{
- jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID));
+ jtag_add_dr_scan(3, fields, jtag_get_end_state());
if ((retval = jtag_execute_queue()) != ERROR_OK)
return retval;
diff --git a/src/target/embeddedice.h b/src/target/embeddedice.h
index ec23ec75..4fdadfb7 100644
--- a/src/target/embeddedice.h
+++ b/src/target/embeddedice.h
@@ -121,7 +121,7 @@ static __inline__ void embeddedice_write_reg_inner( jtag_tap_t *tap, int reg_add
3,
embeddedice_num_bits,
values,
- jtag_add_end_state(TAP_INVALID));
+ jtag_get_end_state());
}
void embeddedice_write_dcc(jtag_tap_t *tap, int reg_addr, u8 *buffer, int little, int count);
diff --git a/src/target/etb.c b/src/target/etb.c
index 5d0d06be..31517d7a 100644
--- a/src/target/etb.c
+++ b/src/target/etb.c
@@ -63,7 +63,7 @@ static int etb_set_instr(etb_t *etb, u32 new_instr)
field.in_value = NULL;
- jtag_add_ir_scan(1, &field, jtag_add_end_state(TAP_INVALID));
+ jtag_add_ir_scan(1, &field, jtag_get_end_state());
free(field.out_value);
}
@@ -86,7 +86,7 @@ static int etb_scann(etb_t *etb, u32 new_scan_chain)
/* select INTEST instruction */
etb_set_instr(etb, 0x2);
- jtag_add_dr_scan(1, &field, jtag_add_end_state(TAP_INVALID));
+ jtag_add_dr_scan(1, &field, jtag_get_end_state());
etb->cur_scan_chain = new_scan_chain;
@@ -190,7 +190,7 @@ static int etb_read_ram(etb_t *etb, u32 *data, int num_frames)
buf_set_u32(fields[2].out_value, 0, 1, 0);
fields[2].in_value = NULL;
- jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID));
+ jtag_add_dr_scan(3, fields, jtag_get_end_state());
for (i = 0; i < num_frames; i++)
{
@@ -204,7 +204,7 @@ static int etb_read_ram(etb_t *etb, u32 *data, int num_frames)
buf_set_u32(fields[1].out_value, 0, 7, 0);
fields[0].in_value = (u8 *)(data+i);
- jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID));
+ jtag_add_dr_scan(3, fields, jtag_get_end_state());
jtag_add_callback(etb_getbuf, (u8 *)(data+i));
}
@@ -252,7 +252,7 @@ int etb_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask)
fields[2].check_value = NULL;
fields[2].check_mask = NULL;
- jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID));
+ jtag_add_dr_scan(3, fields, jtag_get_end_state());
/* read the identification register in the second run, to make sure we
* don't read the ETB data register twice, skipping every second entry
@@ -262,7 +262,7 @@ int etb_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask)
fields[0].check_value = check_value;
fields[0].check_mask = check_mask;
- jtag_add_dr_scan_check(3, fields, jtag_add_end_state(TAP_INVALID));
+ jtag_add_dr_scan_check(3, fields, jtag_get_end_state());
free(fields[1].out_value);
free(fields[2].out_value);
diff --git a/src/target/etm.c b/src/target/etm.c
index 50bfa159..22b50d76 100644
--- a/src/target/etm.c
+++ b/src/target/etm.c
@@ -347,13 +347,13 @@ int etm_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask)
fields[2].check_value = NULL;
fields[2].check_mask = NULL;
- jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID));
+ jtag_add_dr_scan(3, fields, jtag_get_end_state());
fields[0].in_value = reg->value;
fields[0].check_value = check_value;
fields[0].check_mask = check_mask;
- jtag_add_dr_scan_check(3, fields, jtag_add_end_state(TAP_INVALID));
+ jtag_add_dr_scan_check(3, fields, jtag_get_end_state());
free(fields[1].out_value);
free(fields[2].out_value);
@@ -430,7 +430,7 @@ int etm_write_reg(reg_t *reg, u32 value)
buf_set_u32(fields[2].out_value, 0, 1, 1);
fields[2].in_value = NULL;
- jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID));
+ jtag_add_dr_scan(3, fields, jtag_get_end_state());
return ERROR_OK;
}
diff --git a/src/target/feroceon.c b/src/target/feroceon.c
index 5a45f2fd..36c738f7 100644
--- a/src/target/feroceon.c
+++ b/src/target/feroceon.c
@@ -159,9 +159,9 @@ int feroceon_dummy_clock_out(arm_jtag_t *jtag_info, u32 instr)
- jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID));
+ jtag_add_dr_scan(3, fields, jtag_get_end_state());
- /* no jtag_add_runtest(0, jtag_add_end_state(TAP_INVALID)) here */
+ /* no jtag_add_runtest(0, jtag_get_end_state()) here */
return ERROR_OK;
}
diff --git a/src/target/mips_ejtag.c b/src/target/mips_ejtag.c
index 4e451ec7..f9a6862e 100644
--- a/src/target/mips_ejtag.c
+++ b/src/target/mips_ejtag.c
@@ -50,7 +50,7 @@ int mips_ejtag_set_instr(mips_ejtag_t *ejtag_info, int new_instr, void *delete_m
- jtag_add_ir_scan(1, &field, jtag_add_end_state(TAP_INVALID));
+ jtag_add_ir_scan(1, &field, jtag_get_end_state());
}
return ERROR_OK;
@@ -73,7 +73,7 @@ int mips_ejtag_get_idcode(mips_ejtag_t *ejtag_info, u32 *idcode)
- jtag_add_dr_scan(1, &field, jtag_add_end_state(TAP_INVALID));
+ jtag_add_dr_scan(1, &field, jtag_get_end_state());
if (jtag_execute_queue() != ERROR_OK)
{
@@ -100,7 +100,7 @@ int mips_ejtag_get_impcode(mips_ejtag_t *ejtag_info, u32 *impcode)
- jtag_add_dr_scan(1, &field, jtag_add_end_state(TAP_INVALID));
+ jtag_add_dr_scan(1, &field, jtag_get_end_state());
if (jtag_execute_queue() != ERROR_OK)
{
@@ -131,7 +131,7 @@ int mips_ejtag_drscan_32(mips_ejtag_t *ejtag_info, u32 *data)
- jtag_add_dr_scan(1, &field, jtag_add_end_state(TAP_INVALID));
+ jtag_add_dr_scan(1, &field, jtag_get_end_state());
if ((retval = jtag_execute_queue()) != ERROR_OK)
{
diff --git a/src/target/xscale.c b/src/target/xscale.c
index 3f0a055a..fa9bb70b 100644
--- a/src/target/xscale.c
+++ b/src/target/xscale.c
@@ -212,7 +212,7 @@ int xscale_jtag_set_instr(jtag_tap_t *tap, u32 new_instr)
u8 tmp[4];
field.in_value = tmp;
- jtag_add_ir_scan(1, &field, jtag_add_end_state(TAP_INVALID));
+ jtag_add_ir_scan(1, &field, jtag_get_end_state());
/* FIX!!!! isn't this check superfluous? verify_ircapture handles this? */
jtag_check_value_mask(&field, tap->expected, tap->expected_mask);
@@ -262,7 +262,7 @@ int xscale_read_dcsr(target_t *target)
u8 tmp2;
fields[2].in_value = &tmp2;
- jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID));
+ jtag_add_dr_scan(3, fields, jtag_get_end_state());
jtag_check_value_mask(fields+0, &field0_check_value, &field0_check_mask);
jtag_check_value_mask(fields+2, &field2_check_value, &field2_check_mask);
@@ -285,7 +285,7 @@ int xscale_read_dcsr(target_t *target)
jtag_add_end_state(TAP_IDLE);
- jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID));
+ jtag_add_dr_scan(3, fields, jtag_get_end_state());
/* DANGER!!! this must be here. It will make sure that the arguments
* to jtag_set_check_value() does not go out of scope! */
@@ -347,7 +347,7 @@ int xscale_receive(target_t *target, u32 *buffer, int num_words)
jtag_add_end_state(TAP_IDLE);
xscale_jtag_set_instr(xscale->jtag_info.tap, xscale->jtag_info.dbgtx);
- jtag_add_runtest(1, jtag_add_end_state(TAP_INVALID)); /* ensures that we're in the TAP_IDLE state as the above could be a no-op */
+ jtag_add_runtest(1, jtag_get_end_state()); /* ensures that we're in the TAP_IDLE state as the above could be a no-op */
/* repeat until all words have been collected */
int attempts=0;
@@ -725,7 +725,7 @@ int xscale_write_dcsr(target_t *target, int hold_rst, int ext_dbg_brk)
u8 tmp2;
fields[2].in_value = &tmp2;
- jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID));
+ jtag_add_dr_scan(3, fields, jtag_get_end_state());
jtag_check_value_mask(fields+0, &field0_check_value, &field0_check_mask);
jtag_check_value_mask(fields+2, &field2_check_value, &field2_check_mask);
@@ -800,7 +800,7 @@ int xscale_load_ic(target_t *target, int mini, u32 va, u32 buffer[8])
- jtag_add_dr_scan(2, fields, jtag_add_end_state(TAP_INVALID));
+ jtag_add_dr_scan(2, fields, jtag_get_end_state());
fields[0].num_bits = 32;
fields[0].out_value = packet;
@@ -816,7 +816,7 @@ int xscale_load_ic(target_t *target, int mini, u32 va, u32 buffer[8])
memcpy(&value, packet, sizeof(u32));
cmd = parity(value);
- jtag_add_dr_scan(2, fields, jtag_add_end_state(TAP_INVALID));
+ jtag_add_dr_scan(2, fields, jtag_get_end_state());
}
jtag_execute_queue();
@@ -862,7 +862,7 @@ int xscale_invalidate_ic_line(target_t *target, u32 va)
- jtag_add_dr_scan(2, fields, jtag_add_end_state(TAP_INVALID));
+ jtag_add_dr_scan(2, fields, jtag_get_end_state());
return ERROR_OK;
}
generated by cgit v1.2.3 (git 2.46.0) at 2024-11-10 18:22:38 +0000