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Diffstat (limited to 'tcl/board/hitex_lpc2929.cfg')
-rw-r--r--tcl/board/hitex_lpc2929.cfg6
1 files changed, 3 insertions, 3 deletions
diff --git a/tcl/board/hitex_lpc2929.cfg b/tcl/board/hitex_lpc2929.cfg
index 7d06f745..35cc7d0b 100644
--- a/tcl/board/hitex_lpc2929.cfg
+++ b/tcl/board/hitex_lpc2929.cfg
@@ -7,7 +7,7 @@ jtag_ntrst_delay 1
# Maximum of 1/8 of clock frequency (XTAL = 16 MHz).
# Adaptive clocking through RTCK is not supported.
-jtag_khz 2000
+adapter_khz 2000
# Target device: LPC29xx with ETB
# The following variables are used by the LPC2900 script:
@@ -24,7 +24,7 @@ $_TARGETNAME configure -work-area-phys 0x58000000 -work-area-size 0x10000 -work-
# Event handlers
$_TARGETNAME configure -event reset-start {
# Back to the slow JTAG clock
- jtag_khz 2000
+ adapter_khz 2000
}
# External 16-bit flash at chip select CS7 (SST39VF3201-70, 4 MiB)
@@ -46,7 +46,7 @@ $_TARGETNAME configure -event reset-init {
mww 0xFFFF8070 0x02000000 # SYS_CLK_CONF: PLL
# Increase JTAG speed
- jtag_khz 6000
+ adapter_khz 6000
# Enable external memory bus (16-bit SRAM at CS6, 16-bit flash at CS7)
mww 0xE0001138 0x0000001F # P1.14 = D0