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-rw-r--r--tcl/target/stm32.cfg10
1 files changed, 9 insertions, 1 deletions
diff --git a/tcl/target/stm32.cfg b/tcl/target/stm32.cfg
index 2fe17850..61ae562f 100644
--- a/tcl/target/stm32.cfg
+++ b/tcl/target/stm32.cfg
@@ -12,6 +12,14 @@ if { [info exists ENDIAN] } {
set _ENDIAN little
}
+#Checking if user had set the work-area-size for the chip
+#If not, the value will be set to 16k
+if { [info exists WORKAREASIZE] } {
+ set _WORKAREASIZE $WORKAREASIZE
+} else {
+ set _WORKAREASIZE 0x4000
+}
+
# jtag speed
jtag_khz 500
@@ -50,7 +58,7 @@ jtag newtap $_CHIPNAME bs -irlen 5 -ircapture 0x1 -irmask 0x1 -expected-id $_BS
set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME
-$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x20000000 -work-area-size 16384 -work-area-backup 0
+$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
flash bank stm32x 0 0 0 0 0