diff options
Diffstat (limited to 'testing/examples/SAM7X256Test/prj')
| -rw-r--r-- | testing/examples/SAM7X256Test/prj/eclipse_ram.gdb | 32 | ||||
| -rw-r--r-- | testing/examples/SAM7X256Test/prj/eclipse_rom.gdb | 32 | ||||
| -rw-r--r-- | testing/examples/SAM7X256Test/prj/sam7x256_jtagkey.cfg | 43 | ||||
| -rw-r--r-- | testing/examples/SAM7X256Test/prj/sam7x256_ram.ld | 132 | ||||
| -rw-r--r-- | testing/examples/SAM7X256Test/prj/sam7x256_reset.script | 17 | ||||
| -rw-r--r-- | testing/examples/SAM7X256Test/prj/sam7x256_rom.ld | 133 |
6 files changed, 389 insertions, 0 deletions
diff --git a/testing/examples/SAM7X256Test/prj/eclipse_ram.gdb b/testing/examples/SAM7X256Test/prj/eclipse_ram.gdb new file mode 100644 index 00000000..523cb208 --- /dev/null +++ b/testing/examples/SAM7X256Test/prj/eclipse_ram.gdb @@ -0,0 +1,32 @@ +target remote localhost:3333
+monitor reset
+monitor sleep 500
+monitor poll
+monitor soft_reset_halt
+monitor arm7_9 sw_bkpts enable
+
+# WDT_MR, disable watchdog
+monitor mww 0xFFFFFD44 0x00008000
+
+# RSTC_MR, enable user reset
+monitor mww 0xfffffd08 0xa5000001
+
+# CKGR_MOR
+monitor mww 0xFFFFFC20 0x00000601
+monitor sleep 10
+
+# CKGR_PLLR
+monitor mww 0xFFFFFC2C 0x00481c0e
+monitor sleep 10
+
+# PMC_MCKR
+monitor mww 0xFFFFFC30 0x00000007
+monitor sleep 10
+
+# PMC_IER
+monitor mww 0xFFFFFF60 0x00480100
+monitor sleep 100
+
+load
+break main
+continue
diff --git a/testing/examples/SAM7X256Test/prj/eclipse_rom.gdb b/testing/examples/SAM7X256Test/prj/eclipse_rom.gdb new file mode 100644 index 00000000..3aabf849 --- /dev/null +++ b/testing/examples/SAM7X256Test/prj/eclipse_rom.gdb @@ -0,0 +1,32 @@ +target remote localhost:3333
+monitor reset
+monitor sleep 500
+monitor poll
+monitor soft_reset_halt
+monitor arm7_9 force_hw_bkpts enable
+
+# WDT_MR, disable watchdog
+monitor mww 0xFFFFFD44 0x00008000
+
+# RSTC_MR, enable user reset
+monitor mww 0xfffffd08 0xa5000001
+
+# CKGR_MOR
+monitor mww 0xFFFFFC20 0x00000601
+monitor sleep 10
+
+# CKGR_PLLR
+monitor mww 0xFFFFFC2C 0x00481c0e
+monitor sleep 10
+
+# PMC_MCKR
+monitor mww 0xFFFFFC30 0x00000007
+monitor sleep 10
+
+# PMC_IER
+monitor mww 0xFFFFFF60 0x00480100
+monitor sleep 100
+
+load
+break main
+continue
diff --git a/testing/examples/SAM7X256Test/prj/sam7x256_jtagkey.cfg b/testing/examples/SAM7X256Test/prj/sam7x256_jtagkey.cfg new file mode 100644 index 00000000..5dde1d75 --- /dev/null +++ b/testing/examples/SAM7X256Test/prj/sam7x256_jtagkey.cfg @@ -0,0 +1,43 @@ +#daemon configuration
+telnet_port 4444
+gdb_port 3333
+
+# tell gdb our flash memory map
+# and enable flash programming
+gdb_memory_map enable
+gdb_flash_program enable
+
+#interface
+interface ft2232
+ft2232_device_desc "Amontec JTAGkey A"
+ft2232_layout jtagkey
+ft2232_vid_pid 0x0403 0xcff8
+jtag_speed 0
+jtag_nsrst_delay 200
+jtag_ntrst_delay 200
+
+
+#use combined on interfaces or targets that can't set TRST/SRST separately
+reset_config srst_only srst_pulls_trst
+
+#jtag scan chain
+#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
+jtag_device 4 0x1 0xf 0xe
+
+#target configuration
+daemon_startup reset
+
+#target <type> <startup mode>
+#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
+target arm7tdmi little run_and_init 0 arm7tdmi
+run_and_halt_time 0 30
+
+target_script 0 reset .\prj\sam7x256_reset.script
+
+working_area 0 0x00200000 0x4000 nobackup
+
+#flash bank <driver> <base> <size> <chip_width> <bus_width>
+flash bank at91sam7 0 0 0 0 0
+
+# For more information about the configuration files, take a look at:
+# http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger
diff --git a/testing/examples/SAM7X256Test/prj/sam7x256_ram.ld b/testing/examples/SAM7X256Test/prj/sam7x256_ram.ld new file mode 100644 index 00000000..9fc35c86 --- /dev/null +++ b/testing/examples/SAM7X256Test/prj/sam7x256_ram.ld @@ -0,0 +1,132 @@ +/****************************************************************************
+* Copyright (c) 2006 by Michael Fischer. All rights reserved.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*
+* 1. Redistributions of source code must retain the above copyright
+* notice, this list of conditions and the following disclaimer.
+* 2. Redistributions in binary form must reproduce the above copyright
+* notice, this list of conditions and the following disclaimer in the
+* documentation and/or other materials provided with the distribution.
+* 3. Neither the name of the author nor the names of its contributors may
+* be used to endorse or promote products derived from this software
+* without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
+* THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
+* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+* SUCH DAMAGE.
+*
+****************************************************************************
+*
+* History:
+*
+* 30.03.06 mifi First Version
+****************************************************************************/
+
+
+ENTRY(ResetHandler)
+SEARCH_DIR(.)
+
+/*
+ * Define stack size here
+ */
+FIQ_STACK_SIZE = 0x0100;
+IRQ_STACK_SIZE = 0x0100;
+ABT_STACK_SIZE = 0x0100;
+UND_STACK_SIZE = 0x0100;
+SVC_STACK_SIZE = 0x0400;
+
+
+MEMORY
+{
+ ram : org = 0x00200000, len = 64k
+}
+
+/*
+ * Do not change the next code
+ */
+SECTIONS
+{
+ .text :
+ {
+ *(.vectors);
+ . = ALIGN(4);
+ *(.init);
+ . = ALIGN(4);
+ *(.text);
+ . = ALIGN(4);
+ *(.rodata);
+ . = ALIGN(4);
+ *(.rodata*);
+ . = ALIGN(4);
+ *(.glue_7t);
+ . = ALIGN(4);
+ *(.glue_7);
+ . = ALIGN(4);
+ etext = .;
+ } > ram
+
+ .data :
+ {
+ PROVIDE (__data_start = .);
+ *(.data)
+ . = ALIGN(4);
+ edata = .;
+ _edata = .;
+ PROVIDE (__data_end = .);
+ } > ram
+
+ .bss :
+ {
+ PROVIDE (__bss_start = .);
+ *(.bss)
+ *(COMMON)
+ . = ALIGN(4);
+ PROVIDE (__bss_end = .);
+
+ . = ALIGN(256);
+
+ PROVIDE (__stack_start = .);
+
+ PROVIDE (__stack_fiq_start = .);
+ . += FIQ_STACK_SIZE;
+ . = ALIGN(4);
+ PROVIDE (__stack_fiq_end = .);
+
+ PROVIDE (__stack_irq_start = .);
+ . += IRQ_STACK_SIZE;
+ . = ALIGN(4);
+ PROVIDE (__stack_irq_end = .);
+
+ PROVIDE (__stack_abt_start = .);
+ . += ABT_STACK_SIZE;
+ . = ALIGN(4);
+ PROVIDE (__stack_abt_end = .);
+
+ PROVIDE (__stack_und_start = .);
+ . += UND_STACK_SIZE;
+ . = ALIGN(4);
+ PROVIDE (__stack_und_end = .);
+
+ PROVIDE (__stack_svc_start = .);
+ . += SVC_STACK_SIZE;
+ . = ALIGN(4);
+ PROVIDE (__stack_svc_end = .);
+ PROVIDE (__stack_end = .);
+ PROVIDE (__heap_start = .);
+ } > ram
+
+}
+/*** EOF ***/
+
diff --git a/testing/examples/SAM7X256Test/prj/sam7x256_reset.script b/testing/examples/SAM7X256Test/prj/sam7x256_reset.script new file mode 100644 index 00000000..ff609b01 --- /dev/null +++ b/testing/examples/SAM7X256Test/prj/sam7x256_reset.script @@ -0,0 +1,17 @@ +#
+# Init - taken form the script openocd_at91sam7_ecr.script
+#
+# I take this script from the following page:
+#
+# http://www.siwawi.arubi.uni-kl.de/avr_projects/arm_projects/openocd_intro/index.html
+#
+mww 0xfffffd44 0x00008000 # disable watchdog
+mww 0xfffffd08 0xa5000001 # enable user reset
+mww 0xfffffc20 0x00000601 # CKGR_MOR : enable the main oscillator
+sleep 10
+mww 0xfffffc2c 0x00481c0e # CKGR_PLLR: 96.1097 MHz
+sleep 10
+mww 0xfffffc30 0x00000007 # PMC_MCKR : MCK = PLL / 2 ~= 48 MHz
+sleep 10
+mww 0xffffff60 0x003c0100 # MC_FMR: flash mode (FWS=1,FMCN=60)
+sleep 100
diff --git a/testing/examples/SAM7X256Test/prj/sam7x256_rom.ld b/testing/examples/SAM7X256Test/prj/sam7x256_rom.ld new file mode 100644 index 00000000..e38746c2 --- /dev/null +++ b/testing/examples/SAM7X256Test/prj/sam7x256_rom.ld @@ -0,0 +1,133 @@ +/****************************************************************************
+* Copyright (c) 2006 by Michael Fischer. All rights reserved.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*
+* 1. Redistributions of source code must retain the above copyright
+* notice, this list of conditions and the following disclaimer.
+* 2. Redistributions in binary form must reproduce the above copyright
+* notice, this list of conditions and the following disclaimer in the
+* documentation and/or other materials provided with the distribution.
+* 3. Neither the name of the author nor the names of its contributors may
+* be used to endorse or promote products derived from this software
+* without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
+* THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
+* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+* SUCH DAMAGE.
+*
+****************************************************************************
+*
+* History:
+*
+* 26.01.08 mifi First Version
+****************************************************************************/
+
+
+ENTRY(ResetHandler)
+SEARCH_DIR(.)
+
+/*
+ * Define stack size here
+ */
+FIQ_STACK_SIZE = 0x0100;
+IRQ_STACK_SIZE = 0x0100;
+ABT_STACK_SIZE = 0x0100;
+UND_STACK_SIZE = 0x0100;
+SVC_STACK_SIZE = 0x0400;
+
+
+MEMORY
+{
+ rom : org = 0x00100000, len = 256k
+ ram : org = 0x00200000, len = 64k
+}
+
+/*
+ * Do not change the next code
+ */
+SECTIONS
+{
+ .text :
+ {
+ *(.vectors);
+ . = ALIGN(4);
+ *(.init);
+ . = ALIGN(4);
+ *(.text);
+ . = ALIGN(4);
+ *(.rodata);
+ . = ALIGN(4);
+ *(.rodata*);
+ . = ALIGN(4);
+ *(.glue_7t);
+ . = ALIGN(4);
+ *(.glue_7);
+ . = ALIGN(4);
+ etext = .;
+ } > rom
+
+ .data :
+ {
+ PROVIDE (__data_start = .);
+ *(.data)
+ . = ALIGN(4);
+ edata = .;
+ _edata = .;
+ PROVIDE (__data_end = .);
+ } > ram
+
+ .bss :
+ {
+ PROVIDE (__bss_start = .);
+ *(.bss)
+ *(COMMON)
+ . = ALIGN(4);
+ PROVIDE (__bss_end = .);
+
+ . = ALIGN(256);
+
+ PROVIDE (__stack_start = .);
+
+ PROVIDE (__stack_fiq_start = .);
+ . += FIQ_STACK_SIZE;
+ . = ALIGN(4);
+ PROVIDE (__stack_fiq_end = .);
+
+ PROVIDE (__stack_irq_start = .);
+ . += IRQ_STACK_SIZE;
+ . = ALIGN(4);
+ PROVIDE (__stack_irq_end = .);
+
+ PROVIDE (__stack_abt_start = .);
+ . += ABT_STACK_SIZE;
+ . = ALIGN(4);
+ PROVIDE (__stack_abt_end = .);
+
+ PROVIDE (__stack_und_start = .);
+ . += UND_STACK_SIZE;
+ . = ALIGN(4);
+ PROVIDE (__stack_und_end = .);
+
+ PROVIDE (__stack_svc_start = .);
+ . += SVC_STACK_SIZE;
+ . = ALIGN(4);
+ PROVIDE (__stack_svc_end = .);
+ PROVIDE (__stack_end = .);
+ PROVIDE (__heap_start = .);
+ } > ram
+
+}
+/*** EOF ***/
+
|