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* at91: add at91sam9261 supportJean-Christophe PLAGNIOL-VILLARD2011-03-031-0/+14
| | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
* at91sam9: factorise cpu supportJean-Christophe PLAGNIOL-VILLARD2011-03-036-127/+70
| | | | | | | | all at91sam9 are nearly the same except sram and soc name Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
* jlink: add jlink_pid to specify the pid to useJean-Christophe PLAGNIOL-VILLARD2011-03-022-2/+27
| | | | | | | | this will allow us to use multiple jlink at the same time as when the USB-Address is specified the PID change from 0x0101 to (0x101 + usb_adress) Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* jlink: switch commands to subcommandsJean-Christophe PLAGNIOL-VILLARD2011-03-022-5/+15
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* jlink: harmonise the device name to J-LinkJean-Christophe PLAGNIOL-VILLARD2011-03-021-4/+4
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* jlink: add new PID and VIDJean-Christophe PLAGNIOL-VILLARD2011-03-021-2/+8
| | | | | | | | | The default pid of the segger is 0x0101 But when you change the USB Address it will also pid = ( usb_address > 0x4) ? 0x0101 : (0x101 + usb_address) Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* svf: add nil option that just runs through the svf fileØyvind Harboe2011-02-281-18/+49
| | | | | | | | useful for debugging without access to hardware to e.g. regression test, reproduce memory corruption problems, etc. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* log: debug level is between silent and debug output levelsØyvind Harboe2011-02-251-9/+8
| | | | | | It wasn't previously possible to silence the output. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* jtag: add wait_srst_deassert commandØyvind Harboe2011-02-251-0/+51
| | | | | | Useful to do something *real quick* after a SRST deassert. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* ft2232: fix possible read buffer overflowMathias K2011-02-241-3/+17
| | | | | | | | This patch fix a possible read buffer overflow in ft2232_execute_queue. Also the correct read queue size for libftdi and libftd2xx was added and and tested. In function ft2232_write a uninitialized value was initialized because we don't know if this value was set in the ftdi api call.
* cortex_a8: remove dap_ap_sel callsLuca Ellero2011-02-231-68/+60
| | | | | | | add new mem_ap_sel_* functions (as was made for cortex_a9) see commit: 779005f43dc372de937dfd4b445f31d882b98eca Signed-off-by: Luca Ellero <lroluk@gmail.com>
* add at91rm9200-ek board supportJean-Christophe PLAGNIOL-VILLARD2011-02-231-0/+112
| | | | | | | | | | | | | | | | | tested with jlink sam-ice v5 while loading barebox (gdb) load Loading section .text, size 0x2f190 lma 0x21f00000 Loading section .rodata, size 0x931c lma 0x21f2f190 Loading section .data, size 0x29e8 lma 0x21f384ac Loading section .barebox_cmd, size 0x78c lma 0x21f3ae94 Loading section .barebox_initcalls, size 0x80 lma 0x21f3b620 Start address 0x21f00000, load size 243360 Transfer rate: 26 KB/sec, 13520 bytes/write. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
* jlink: set the speed at JLINK_MAX_SPEED when an exceeded speed is requestedJean-Christophe PLAGNIOL-VILLARD2011-02-231-2/+2
| | | | | | | | | | | it will allow to be at the highest speed of the jlink without touching the board or cpu config tested on sam-ice v5 and at91rm9200-ek Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
* dsp563xx: rudimentary gdb supportMathias K2011-02-211-206/+477
| | | | | | | | | | | This patch add rudimentary gdb support. The gdb register list order is corrected. All registers are now 32bit width. Events are send to signalize gdb the current target status. Resume and step function was corrected to consider a modified pc register. Read/write memory now support L memory type, this means a memory with alternating y/x memory words. The memspace variable, used by gdb, is now observed before a default memory access is initiated. Dummy functions for breakpoint and watchpoint are added.
* gitmodules: use http protocol for git2cl moduleEdgar Grimberg2011-02-211-1/+1
| | | | | | | Use the http protocol for git2cl module, as it makes it easier for the firewall safe mirror to keep all submodules firewall safe. Signed-off-by: Edgar Grimberg <edgar.grimberg@gmail.com>
* fix compile error under MinGWSimonQian2011-02-181-3/+3
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* stm32: add ID for medium density device Rev ZLuca Ellero2011-02-181-4/+5
| | | | | | | stm32-discovery evaluation board (STM32F100RBTB6): reading device id register (0xE0042000) returns 0x10010420 Signed-off-by: Luca Ellero <lroluk@gmail.com>
* arm_adi_v5: add/move apsel member in struct adiv5_dapLuca Ellero2011-02-174-75/+72
| | | | | | | | | | | | | | | This patch tries to make some order in "apsel" mess. "dap apsel" command was quite useless (and broken) by itself. With this patch we can use it to select between AHB or APB memory access (previous patch 05ab8bdb813acdcd74afa71d6656c2df816cb230 was somehow broken). - moves member apsel (in struct adiv5_dap) to ap_current - adds apsel member this strange choice is made trying to keep coherence in "dap apsel" command and to keep compatibility with other code (for example cortex_a8). Signed-off-by: Luca Ellero <lroluk@gmail.com>
* dsp563xx: minor fixes, code cleanupMathias K2011-02-171-52/+110
| | | | | | | | This patch move the dsp563xx_target_create function to the related code block. Also the target examine function was added and the register cache is initialized in a separate function. The missing functionality to invalidate the x memory context on memory writes was also added.
* dsp563xx_once: Correct wrong return value on jtag communication errorsMathias K2011-02-171-7/+7
| | | | | | | | This patch change the return value on a jtag communication error to TARGET_UNKNOWN because this function should return the current target status and not a error code from the underlying api call. Also the validity of the jtag_status is extended to all static bits in this value.
* - remove pipeline context, use once register instead - fix wrong register ↵Mathias K2011-02-172-71/+82
| | | | write in resume and step function - add more conditional branch handling
* lpc32xx: Flash driverBjarne Steinsbo2011-02-155-0/+1932
| | | | | | | | | | Based on the lpc3180 driver, but released as a separate driver for two reasons: 1) I don't have an lpc3180 to test it against, so it might unintentionally break compatibility. 2) It's using a different OOB layout than lpc3180. Rewritten so that it no longer borrows code from the NXP CDL library. Instead borrowing code from the u-boot port to lpc32xx, written by Kevin Wells. Tested on lpc3250 (Hitex LPC3250-Stick). OOB layout is compatible with LPCLinux.
* - add parameter flush to the once api to signalize if the jtag queue need to ↵Mathias K2011-02-153-167/+90
| | | | be flushed after the command
* - add bulk memory write function - execute jtag queue at the end of the ↵Mathias K2011-02-151-11/+47
| | | | memory transfer
* dsp563xx_once: Correct definition of JTAG_INSTR_CLAMPPhil Fong2011-02-151-1/+1
| | | | | | | | | | | I've been working on Rodrigo on adding support to flash Freescale dsp56800e devices and have been looking at the dsp563xx code. I think the define for the JTAG CLAMP instruction in dsp563xx_once.c is incorrect. It should be 0x05 according the Freescale AN2074 (and is also 0x05 in the dsp568xx according to AN1935). It won't actually change anything in OpenOCD since this define is not used anywhere (as far as I can tell).
* ft2232: add functions for ft2232 set data bits high/low byte commandMathias K2011-02-141-280/+93
| | | | reduce duplication. No change in behavior.
* cortex_a9: move dap_ap_select to arm_avi_v5Luca Ellero2011-02-141-92/+66
| | | | | | | | | | | | | | | dap_ap_select was used in the code at various points, but that can lead to confusion, without any knowledge of what AP is really selected at some points. Some bugs derive from this (for example md/mw doesn't work well after issueing "dap apsel" command). Moving it to arm_adi_v5.c (using mem_ap_sel* functions instead of mem_ap_*) make the code more clear and more easier to maintain. In the future it should be made "static" to avoid its use outside arm_adi_v5 One further benefit is the various goto has been removed as well Signed-off-by: Luca Ellero <lroluk@gmail.com>
* arm_adi_v5: add wrapping transfer functions with selection of apLuca Ellero2011-02-142-1/+75
| | | | Signed-off-by: Luca Ellero <lroluk@gmail.com>
* arm_adi_v5: add transfer functions prototypes with selection of apLuca Ellero2011-02-141-0/+31
| | | | Signed-off-by: Luca Ellero <lroluk@gmail.com>
* cortex_a9: check if MMU is enabled on APB read/write memoryLuca Ellero2011-02-141-0/+22
| | | | Signed-off-by: Luca Ellero <lroluk@gmail.com>
* cortex_a9: check target halted on APB read/write memoryLuca Ellero2011-02-141-0/+12
| | | | Signed-off-by: Luca Ellero <lroluk@gmail.com>
* cortex_a9: trivial fixesLuca Ellero2011-02-141-6/+7
| | | | Signed-off-by: Luca Ellero <lroluk@gmail.com>
* buikd: fix cygwin -mno-cygwin build errorSpencer Oliver2011-02-101-1/+1
| | | | | | Remove duplicate inline that causes certain versions of gcc to choke. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* cortex_a9: implement read/write memory through APB-APLuca Ellero2011-02-101-31/+129
| | | | | | | | | | | | | | | This patch adds read/write capability to memory addresses not accessible through AHB-AP (for example "boot ROM code"). To select AHB or APB, a "dap apsel" command must be issued: dap apsel 0 -> following memory accesses are through AHB dap apsel 1 -> following memory accesses are through APB NOTE: at the moment APB memory accesses are very slow, compared to AHB accesses. Work has to be done to get it faster (for example LDR/STR instead od LDRB/STRB) Signed-off-by: Luca Ellero <lroluk@gmail.com>
* cortex_a9: fix dap_ap_select() usageAaron Carroll2011-02-101-6/+20
| | | | | | | Save, select and restore AP in cortex_a9_step and cortex_a9_init_debug_access. Fixes a bug where the wrong AP is selected after a reset. Signed-off-by: Aaron Carroll <aaronc@cse.unsw.edu.au>
* buspirate: Fix command parsing, fix errors to have more sense.Michal Demin2011-02-081-28/+26
| | | | Signed-off-by: Michal Demin <michaldemin@gmail.com>
* performance: committed wrong version of buf_set_buf optimizationMathias K2011-02-081-4/+18
| | | | | | oops... Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* omap4430: Add JRC TAPID for PandaBoard REV EA1 (PEAP platforms)Luca Ellero2011-02-081-2/+12
| | | | | | | PandaBoard REV EA1 (Panda Early Adopter Program) has a different ID. This patch add alternate REV EA1 TAP id to configuration file Signed-off-by: Luca Ellero <lroluk@gmail.com>
* dsp563xx: add x, y and p memory accessMathias K2011-02-082-73/+311
| | | | | | | | | | | Hello, this patch add commands to access to x,y and p memory. For run time optimization some local jtag function was changed to static inline. Regards, Mathias
* cortex_a8/a9: fix some commentsLuca Ellero2011-02-082-8/+8
| | | | Signed-off-by: Luca Ellero <lroluk@gmail.com>
* buf_set_buf around 30% speed increaseMathias K2011-02-081-7/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | Also i have checked the input of this function and in many cases a simple byte copy is possible. I have added this check now and is it possible the buffer is copied byte by byte and not bit by bit. With byte boundary input the test looks like this: buf_set_buf 0x02000000 iteration test: runtime (seconds): old: 6.828559 new: 0.436191 diff: 6.392368 runtime (seconds): old: 6.853636 new: 0.430389 diff: 6.423247 runtime (seconds): old: 6.794985 new: 0.423065 diff: 6.371920 Without: buf_set_buf 0x02000000 iteration test: runtime (seconds): old: 6.370869 new: 5.552624 diff: 0.818245 runtime (seconds): old: 6.420730 new: 5.665887 diff: 0.754843 runtime (seconds): old: 6.583306 new: 5.599021 diff: 0.984285 Regards, Mathias
* stm32x: add support for STM32F20xØyvind Harboe2011-02-044-0/+778
| | | | | | ready for wider testing and comments on basic erase + programming. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* more changes to dsp563xx codeMathias K2011-02-034-462/+1025
| | | | | | | | | | | | | Hello, this patch adds the missing cpu registers and the correct read/write register functions and fixed most of the halt/step/resume issues. The complete missing error propagation was added. + fix tab/spaces Regards, Mathias
* 24bit buffer supportMathias K2011-02-033-0/+44
| | | | | | | | | | Hello, this patch add 24bit support to the target buffer functions and little/big endian functions. Regards, Mathias
* omap4430: fix reset sequenceAaron Carroll2011-02-021-8/+3
| | | | | | | | | * Write to the PRM reset control register should have been 'phys'; * Setup empty reset-assert handlers for the M3's, since the board-level reset takes care of them; * Remove the dbginit cruft, because it gets called implicitly on reset. Signed-off-by: Aaron Carroll <aaronc@cse.unsw.edu.au>
* cortex_m3: allow scripts to override resetAaron Carroll2011-02-021-0/+10
| | | | | | | If a handler for the reset-assert event it present, skip the usual reset handling. This is needed, for example, for board-level resets. Signed-off-by: Aaron Carroll <aaronc@cse.unsw.edu.au>
* error: remove debug output when reporting errorsØyvind Harboe2011-01-311-1/+2
| | | | | | The user does not need to know or care about "command handlers". Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* cfi: use ARM32 machine code on all CPUs but Cortex M3Øyvind Harboe2011-01-311-6/+2
| | | | | | | | | | | ARM11 broke with aa61a3b3d8b6acad19050987835ec05f3d298bdb as the code only checked for arm 7/9. CFI probably needs work for non-ARM targets but perhaps not adding working area memory to e.g. MIPS will give the default slow CFI support. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* TCL configs for OMAP4430 and PandaboardAaron Carroll2011-01-312-0/+112
| | | | Signed-off-by: Aaron Carroll <aaronc@cse.unsw.edu.au>
* cortex_a9: add source files for Cortex A9 support.Aaron Carroll2011-01-314-1/+2275
| | | | | | add target and build support for A9 Signed-off-by: Aaron Carroll <aaronc@cse.unsw.edu.au>
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