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* Add DSCR_DTR_RX_FULL bit definemlu2009-09-301-0/+1
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2780 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* strip gdb config optionsoharboe2009-09-302-9/+0
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2779 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* michal smulski <michal.smulski@ooma.com> reset now worksoharboe2009-09-303-67/+212
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2778 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Streamline Capture-IR validation codedbrownell2009-09-291-26/+23
| | | | | | | | | | | | | | | | | - Don't issue needless JTAG resets ... only do them after errors. Normal exit now leaves every TAP in BYPASS. - Fix an unlikely memory leak on one fault path. - Remove the oddball limitation that invalid capture LSBs trigger errors only for TAPs that support IDCODE. Re the JTAG reset: there are too many of them, and they can (and do!) change system state. So the needless ones should get removed. This one was especially pointless. git-svn-id: svn://svn.berlios.de/openocd/trunk@2777 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* ARM11 command handling fixesdbrownell2009-09-292-42/+55
| | | | | | | | | | | - Commands were supposed to have been "arm11 memwrite ..." not "memwrite ..." - Get rid of obfuscatory macros - Re-alphabetize - Add docs for "arm11 vcr" git-svn-id: svn://svn.berlios.de/openocd/trunk@2776 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Make "-expected-id 0" suppress warnings; not unlike it used to do.dbrownell2009-09-292-6/+12
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2775 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Doc updates: add section on target software changes, minor fixesdbrownell2009-09-291-5/+53
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2774 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* ETM: fix build issue on MinGW.dbrownell2009-09-291-20/+21
| | | | | | | The Win32 global namespace is rather cluttered... git-svn-id: svn://svn.berlios.de/openocd/trunk@2773 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* ETB: cleanup needless symbol exports and forward decls.dbrownell2009-09-292-40/+35
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2772 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* handle single threadingoharboe2009-09-291-14/+34
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2771 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* reentry assertoharboe2009-09-291-0/+7
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2770 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* httpd smoketest infooharboe2009-09-292-5/+29
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2769 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* added t/nsrst_assert_width commandsoharboe2009-09-293-0/+72
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2768 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* if srst pulls trst, then set state to TAP_RESET. oharboe2009-09-281-3/+11
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2767 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* spelling fixoharboe2009-09-281-1/+1
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2766 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Shrink symbols exported from arm9tdmi.c and remove a forward ref.dbrownell2009-09-281-35/+38
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2765 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Add list of JTAG adapter drivers with TAP_RESET statemove bug.dbrownell2009-09-271-1/+17
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2764 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Update FT2232 driver so that it reliably enters TAP_RESET.dbrownell2009-09-271-2/+10
| | | | | | | | | | | | | | | | When the OpenOCD server starts up it records its state as TAP_RESET, even though it could be anything. Then when it starts to examine the scan chain, it calls jtag_add_tlr() which sees it doesn't have any work to do, and so it does nothing. This can make the next operations fail because they start from the wrong TAP state... Instead of caring about the current recorded state, always enter TAP_RESET by forcing five clocks with TMS high. (NOTE: it seems most other JTAG adapter drivers have this same bug.) git-svn-id: svn://svn.berlios.de/openocd/trunk@2763 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Don't provide invalid OMAP5912 IR capture value/mask attributesdbrownell2009-09-271-3/+3
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2762 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* On DM355 EVM board, associate NAND chips with $_TARGETNAMEdbrownell2009-09-261-2/+2
| | | | | | | instead of a target number. git-svn-id: svn://svn.berlios.de/openocd/trunk@2761 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Diagnostics tweaks for jtag_examine_chain() failure paths.dbrownell2009-09-261-3/+4
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2760 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Updates to the initial scanchain validation code:dbrownell2009-09-262-13/+42
| | | | | | | | | | | - minor bug fixes - code cleanup - update comments - improve diagnostics - etc git-svn-id: svn://svn.berlios.de/openocd/trunk@2759 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Streamline Capture-IR handling and integrity test.dbrownell2009-09-262-22/+34
| | | | | | | | | | | | | | | | | | | | Change the handling of the "-ircapture" and "-irmask" parameters to be slightly more sensible, given that the JTAG spec describes what is required, and that we already require that conformance in one place. IR scan returns some bitstring with LSBs "01". - First, provide and use default values that satisfy the IEEE spec. Existing TAP configs will override the defaults, but those parms are no longer required. - Second, warn if any TAP gets set up to violate the JTAG spec. It's likely a bug, but maybe not; else this should be an error. Improve the related diagnostics to say which TAP is affected. And associated minor fixes/cleanups to comments and diagnostics. git-svn-id: svn://svn.berlios.de/openocd/trunk@2758 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Update DM355 target config to know about ICEpick.dbrownell2009-09-251-5/+18
| | | | | | | Still defaults to nonstandard EMU0/EMU1 settings. git-svn-id: svn://svn.berlios.de/openocd/trunk@2757 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Michael Hasselberg <mh@open-engineering.de> target configuration files for ↵oharboe2009-09-254-0/+355
| | | | | | Toshiba TX09 familiy git-svn-id: svn://svn.berlios.de/openocd/trunk@2756 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Try/catch scheme. Typed up the functionality and regression tested.oharboe2009-09-252-9/+100
| | | | | | Ready for discussion and tiny patches that tries out this scheme. git-svn-id: svn://svn.berlios.de/openocd/trunk@2755 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* When attaching GDB to OpenOCD, the target state is no longer affected.oharboe2009-09-242-28/+68
| | | | | | | | | Added gdb_sync feature that allows GDB to sync up to target state. Issue "monitor gdb_sync" and the next stepi, will return immediately with updated register values to GDB. git-svn-id: svn://svn.berlios.de/openocd/trunk@2754 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Start handling the (second) SRST stage of reset better:dbrownell2009-09-231-6/+11
| | | | | | | | | | | make sure that when there are two or more targets, their various pre/post event reports are correctly ordered. Previously, only the first target always saw its "pre" method before SRST was asserted or deasserted. git-svn-id: svn://svn.berlios.de/openocd/trunk@2753 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* When setting up an ETM, cache its ETM_CONFIG register. Thendbrownell2009-09-233-53/+216
| | | | | | | | | | | | | | | | | | | | | | | | | only expose the registers which are actually present. They could be missing for two basic reasons: - This version might not support them at all; e.g. ETMv1.1 doesn't have some control/status registers. (My sample of ARM9 boards shows all with ETMv1.3 support, FWIW.) - The configuration on this chip may not populate as many registers as possible; e.g. only two data value comparators instead of eight. Includes a bugfix in the "etm info" command: only one of the two registers is missing on older silicon, so show the first one before bailing. Update ETM usage docs to explain that those registers need to be written to configure what is traced, and that some ETM configs are not yet handled. Also, give some examples of the kinds of constrained trace which could be arranged. git-svn-id: svn://svn.berlios.de/openocd/trunk@2752 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Start cleaning up ETM register handling. On one ARM926 ETM+ETBdbrownell2009-09-232-167/+176
| | | | | | | | | | | | | | | | | | | | | | system, removes 20 non-existent registers ... but still includes over 45 (!) ETM registers which don't even exist there ... - Integrate the various tables to get one struct per register - Get rid of needless per-register dynamic allocation - Double check list of registers: * Remove sixteen (!) non-registers for data comparators * Remove four registers that imply newer ETM than we support * Change some names to match current architecture specs - Handle more register info * some are write-only * some are read-only * record which versions have them, just in case - Reorganize the registers to facilitate removing the extras * group e.g. comparator/counter #N registers together * add and use lookup-by-ID git-svn-id: svn://svn.berlios.de/openocd/trunk@2751 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Initial ETM cleanups. Most of these are cosmetic:dbrownell2009-09-232-83/+113
| | | | | | | | | | | | | | | | - Add a header comment - Line up the ETM context struct, pack it a bit - Remove unused context_id (this doesn't support ETMv2 yet) - Make most functions static - Remove unused string table and other needless lines of code - Correct "tracemode" helptext Also provide and use an etm_reg_lookup() to find entries in the ETM register cache. This will help cope with corrected contents of that cache, which doesn't include entires for non-existent registers. git-svn-id: svn://svn.berlios.de/openocd/trunk@2750 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Nico Coesel <ncoesel@dealogic.nl> fix warnings. . I'm wondering why theseoharboe2009-09-232-17/+17
| | | | | | | didn't turn up earlier. Is everyone still using gcc 3.x? Or is the x86 version of gcc 4.x much more relaxed? git-svn-id: svn://svn.berlios.de/openocd/trunk@2749 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* - fix build issue under win32 (cygwin/msys) from svn r2746ntfreak2009-09-221-1/+1
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2748 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* - add missing svn props from previous commitntfreak2009-09-222-1953/+1953
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2747 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Make it easier to erase or protect through to the enddbrownell2009-09-222-42/+87
| | | | | | | | | | | | of a (NOR) flash chip: allow passing "last" as an alias for the number of the last sector. Improve several aspects of error checking while we're at it. From: Johnny Halfmoon <jhalfmoon@milksnot.com> git-svn-id: svn://svn.berlios.de/openocd/trunk@2746 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Update presentation of TAP events and tap enable/disable.dbrownell2009-09-211-31/+77
| | | | | | | | | Highlight that the "post-reset" event kicks in before the scan chain is validated, which limits what can be done in a post-reset handler. git-svn-id: svn://svn.berlios.de/openocd/trunk@2745 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Remove annoying end-of-line whitespace from doc/* files.dbrownell2009-09-2115-131/+131
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2744 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Remove annoying end-of-line whitespace from tcl/* filesdbrownell2009-09-2185-683/+682
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2743 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Remove annoying end-of-line whitespace from most src/*dbrownell2009-09-2120-183/+183
| | | | | | | files; omitted src/httpd git-svn-id: svn://svn.berlios.de/openocd/trunk@2742 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Ethan Eade <ethan@evolution.com> board config script for Cogent CSB732 ↵oharboe2009-09-211-0/+71
| | | | | | i.MX35 (arm1136) git-svn-id: svn://svn.berlios.de/openocd/trunk@2741 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Ensure that DaVinci chips can't start with a too-fast JTAG clock.dbrownell2009-09-213-0/+18
| | | | | | | | | | It can be sped up later, once it's known the PLLs are active. Note that modern tools from TI all use adaptive clocking; and that if that's done with OpenOCD, "too fast" is also a non-issue. git-svn-id: svn://svn.berlios.de/openocd/trunk@2740 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Update the jtag-examine_chain() logic to verify that there's nodbrownell2009-09-211-38/+39
| | | | | | | | | | | | | | | | garbage after the expected data (from the TAPs' BYPASS or IDCODE registers). NOTE that there was previously some code that looked like it was trying to do this ... which didn't work, because it was looping over the list of expected TAPs, and never checked *after* that list completed! That could hide some *nasty* reset issues... Also replace a now-obsolete scanchain length test with one that behaves correctly; and update reporting of unexpected IDCODEs. git-svn-id: svn://svn.berlios.de/openocd/trunk@2739 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Enhancement: stm32 flash protection error messagedbrownell2009-09-201-1/+1
| | | | | | | | | | This patch modifies an error message which, in its original state, I find somewhat unhelpful. So a small hint was added. Signed-off-by: Johnny Halfmoon <jhalfmoon at milksnot.com> git-svn-id: svn://svn.berlios.de/openocd/trunk@2738 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Update the User's Guide to cover the scan chain verification stepdbrownell2009-09-201-16/+87
| | | | | | | | done on exit from the config stage, how JTAG clocking issues can trigger errors there, and how to avoid such problems. git-svn-id: svn://svn.berlios.de/openocd/trunk@2737 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Debug message updates:dbrownell2009-09-203-43/+8
| | | | | | | | | | | | | | | | | | | - Shrink messaging during resets, primarily by getting rid of "nothing happened" noise that hides *useful* information. - Improve: the "no IDCODE" message by identifying which tap only supports BYPASS; and the TAP event strings. Related minor code updates: - Remove two needless tests when examining the chain: we know we have a TAP, and that all TAPs have names. - Clean up two loops, turning "while"s into "for"s which better show what's actually being done. git-svn-id: svn://svn.berlios.de/openocd/trunk@2736 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Minor regression bugfix for the jtag_tap_handle_event() casedbrownell2009-09-201-3/+7
| | | | | | | | for disabling TAPs. We don't actually know how to make any JRCs which do that yet; but when we do, this will matter. git-svn-id: svn://svn.berlios.de/openocd/trunk@2735 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Added CPUDBG_WCR_BASE definemlu2009-09-191-0/+1
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2734 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Avoid cache invalidation when writing to hardware debug registersmlu2009-09-191-4/+19
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2733 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Reduced sleep time after reset mlu2009-09-191-1/+2
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2732 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Style cleanup for the updated ft2232_add_pathmove().dbrownell2009-09-191-15/+18
| | | | | | | Indentation, whitespace, line lengths. git-svn-id: svn://svn.berlios.de/openocd/trunk@2731 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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