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* ETM: rename registers, doc tweaksDavid Brownell2009-10-221-2/+17
| | | | | | | | | | | | | | | The register names are perversely not documented as zero-indexed, so rename them to match that convention. Also switch to lowercase suffixes and infix numbering, matching ETB and EmbeddedICE usage. Update docs to be a bit more accurate, especially regarding what the "trigger" event can cause; and to split the issues into a few more paragraphs, for clarity. Make "configure" helptext point out that "oocd_trace" is prototype hardware, not anything "real". Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* mww_phys retired. Replaced by generic mww phys in target.cØyvind Harboe2009-10-211-51/+0
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* virt2phys is now implemented by target.c globally, retire target specific ↵Øyvind Harboe2009-10-211-15/+0
| | | | documentation.
* Added target_read/write_phys_memory() fn's. mdX/mwX commands updated to ↵Øyvind Harboe2009-10-211-6/+10
| | | | support phys flag to specify bypassing of MMU.
* XSVF: use svf_add_statemove()David Brownell2009-10-201-2/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | XSVF improvements: - Layer parts of XSVF directly over SVF, calling svf_add_statemove() instead of expecting jtag_add_statemove() to conform to the SVF/XSVF requirements (which it doesn't). This should improve XSTATE handling a lot; it removes most users of jtag_add_statemove(), and the comments about how it should really do what svf_add_statemove() does. - Update XSTATE logic to be a closer match to the XSVF spec. The main open issue here is (still) that this implementation doesn't know how to build and submit paths from single-state transitions ... but now it will report that error case. - Update the User's Guide to mention the two utility scripts for working with XSVF, and to mention the five extension opcodes. Handling of state transition paths is, overall, still a mess. I think they should all be specified as paths not unlike SVF uses, and compiled to the bitstrings later ... so that we can actually make sense of the paths. (And see the extra clocks, detours through RUN, etc.) Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* Added 'unlock' option to flash write_imageØyvind Harboe2009-10-201-3/+4
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* Doc: jtag_init must validate scan chain tooDavid Brownell2009-10-191-0/+5
| | | | | Same requirement as like init_reset, and for the same reason: we need to start with a known and working state.
* doc updates to match "help" betterDavid Brownell2009-10-141-7/+35
| | | | | | | | | | | | | | | | | | | This makes the documentation a closer match to "help" output: - "pathmove" somehow was not documented in the User's Guide - "jtag_nsrst_assert_width" and "jtag_ntrst_assert_width" are new; both needed descriptions. - Removed two undocumented and fairly useless script mechanisms: * production/production_info/production_test ... using it, requires replacing everything; so having it adds no value. * cpu ... way out of date; hopeless to keep that current Note that anyone using that "production" stuff already defines their own procedures, and can keep using them with no change. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* Retired gdb_attach. gdb-detach event covers this functionality.Øyvind Harboe2009-10-131-5/+0
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* arm11 burst writes are now only enabled for writes larger than 1 word. ↵Øyvind Harboe2009-10-121-1/+5
| | | | Single word writes are frequently used from reset init scripts to non-memory peripherals.
* Retire arm11 no_increment. Intended for future expansion to read/write to ↵Øyvind Harboe2009-10-121-7/+0
| | | | ports. New arm11 commands would have to be added to exploit it.
* tweak new "translating ..." textDavid Brownell2009-10-091-16/+18
| | | | | | | | Fix formatting and layout bugs in the new "translating configuration files" bit. Make it a section within the chapter about config files. Add a crossreference. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* add documentation about reset customizationDavid Brownell2009-10-091-12/+108
| | | | | | | | | | We added two overridable procedures; document them, and the two jtag arp_* operations they necessarily expose. Update the comment about the jtag_init_reset() routine; it's been obsolete for as long as it's had SRST support. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* Added tip in documentation on how to translate quirky syntaxØyvind Harboe2009-10-091-1/+41
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* Houston, we have Mirror!David Brownell2009-10-071-0/+6
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* Change most in-tree references from SVN to GIT.dbrownell2009-10-081-26/+19
| | | | | | | | | Also, talk about "mainline" not "trunk". The release.txt and release.sh files need more updates. git-svn-id: svn://svn.berlios.de/openocd/trunk@2825 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Remove pointless "target library" chapter.dbrownell2009-10-071-36/+84
| | | | | | | | | It had a very little bit of content; move that to the more extensive chapter on config file guidelines, and give more current "ls" output to show the available library code. git-svn-id: svn://svn.berlios.de/openocd/trunk@2820 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Note bug in handling of variables through command line parameters.dbrownell2009-10-071-0/+8
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2819 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Updates for "reset_config":dbrownell2009-10-071-6/+22
| | | | | | | | | | | - revert to previous default: don't talk JTAG during SRST - add "srst_nogates" flag, the converse of "srst_gates_jtag" - with no args, display the current configuration And update the User's Guide text with bullet lists to be a bit more clear. git-svn-id: svn://svn.berlios.de/openocd/trunk@2818 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Add a new JTAG "setup" event; use for better DaVinci ICEpick support.dbrownell2009-10-051-6/+22
| | | | | | | | | | | | | | | | | The model is that this fires after scanchain verification, when it's safe to call "jtag tapenable $TAPNAME". So it will fire as part of non-error paths of "init" and "reset" command processing. However it will *NOT* trigger during "jtag_reset" processing, which skips all scan chain verification, or after verification errors. ALSO: - switch DaVinci chips to use this new mechanism - log TAP activation/deactivation, since their IDCODEs aren't verified - unify "enum jtag_event" scripted event notifications - remove duplicative JTAG_TAP_EVENT_POST_RESET git-svn-id: svn://svn.berlios.de/openocd/trunk@2800 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Minor ETB and ETM bugfixes and doc updatesdbrownell2009-10-021-5/+29
| | | | | | | | | | | | | | | | | | | | | - ETB * report _actual_ hardware status, not just expected status * add a missing diagnostic on a potential ETB setup error * prefix any diagnostics with "ETB" - ETM * make "etm status" show ETM hardware status too, instead of just traceport status (which previously was fake, sigh) - Docs * flesh out "etm tracemode" docs a bit * clarify "etm status" ... previously it was traceport status * explain "etm trigger_percent" as a *traceport* option ETM+ETB tracing still isn't behaving, but now I can see that part of the reason is that the ETB turns itself off almost immediately after being enabled, and before collecting any data. git-svn-id: svn://svn.berlios.de/openocd/trunk@2790 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* ARM11 command handling fixesdbrownell2009-09-291-1/+14
| | | | | | | | | | | - Commands were supposed to have been "arm11 memwrite ..." not "memwrite ..." - Get rid of obfuscatory macros - Re-alphabetize - Add docs for "arm11 vcr" git-svn-id: svn://svn.berlios.de/openocd/trunk@2776 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Make "-expected-id 0" suppress warnings; not unlike it used to do.dbrownell2009-09-291-3/+5
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2775 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Doc updates: add section on target software changes, minor fixesdbrownell2009-09-291-5/+53
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2774 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Streamline Capture-IR handling and integrity test.dbrownell2009-09-261-10/+12
| | | | | | | | | | | | | | | | | | | | Change the handling of the "-ircapture" and "-irmask" parameters to be slightly more sensible, given that the JTAG spec describes what is required, and that we already require that conformance in one place. IR scan returns some bitstring with LSBs "01". - First, provide and use default values that satisfy the IEEE spec. Existing TAP configs will override the defaults, but those parms are no longer required. - Second, warn if any TAP gets set up to violate the JTAG spec. It's likely a bug, but maybe not; else this should be an error. Improve the related diagnostics to say which TAP is affected. And associated minor fixes/cleanups to comments and diagnostics. git-svn-id: svn://svn.berlios.de/openocd/trunk@2758 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* When setting up an ETM, cache its ETM_CONFIG register. Thendbrownell2009-09-231-2/+38
| | | | | | | | | | | | | | | | | | | | | | | | | only expose the registers which are actually present. They could be missing for two basic reasons: - This version might not support them at all; e.g. ETMv1.1 doesn't have some control/status registers. (My sample of ARM9 boards shows all with ETMv1.3 support, FWIW.) - The configuration on this chip may not populate as many registers as possible; e.g. only two data value comparators instead of eight. Includes a bugfix in the "etm info" command: only one of the two registers is missing on older silicon, so show the first one before bailing. Update ETM usage docs to explain that those registers need to be written to configure what is traced, and that some ETM configs are not yet handled. Also, give some examples of the kinds of constrained trace which could be arranged. git-svn-id: svn://svn.berlios.de/openocd/trunk@2752 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Make it easier to erase or protect through to the enddbrownell2009-09-221-6/+12
| | | | | | | | | | | | of a (NOR) flash chip: allow passing "last" as an alias for the number of the last sector. Improve several aspects of error checking while we're at it. From: Johnny Halfmoon <jhalfmoon@milksnot.com> git-svn-id: svn://svn.berlios.de/openocd/trunk@2746 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Update presentation of TAP events and tap enable/disable.dbrownell2009-09-211-31/+77
| | | | | | | | | Highlight that the "post-reset" event kicks in before the scan chain is validated, which limits what can be done in a post-reset handler. git-svn-id: svn://svn.berlios.de/openocd/trunk@2745 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Remove annoying end-of-line whitespace from doc/* files.dbrownell2009-09-211-23/+23
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2744 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Update the User's Guide to cover the scan chain verification stepdbrownell2009-09-201-16/+87
| | | | | | | | done on exit from the config stage, how JTAG clocking issues can trigger errors there, and how to avoid such problems. git-svn-id: svn://svn.berlios.de/openocd/trunk@2737 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Minor tweaks to description of JTAG adapter/dongle issues.dbrownell2009-09-191-4/+12
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2729 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Minor fixes to NAND code and docsdbrownell2009-09-171-3/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | Erase logic: - command invocation + treat "nand erase N" (no offset/length) as "erase whole chip N" + catch a few more bogus parameter cases, like length == 0 (sigh) - nand_erase() should be static - on error + say which block failed, and if it was a bad block + don't give up after the first error; try to erase the rest - on success, say which nand device was erased (name isn't unique) Device list ("nand list"): - say how many blocks there are - split summary into two lines - give example in the docs Doc tweaks: - Use @option{...} for DaVinci's supported hardware ECC options For the record, I've observed that _sometimes_ erasing bad blocks causes failure reports, and that manufacturer bad block markers aren't always erasable (even when erasing their blocks doesn't trigger an error report). git-svn-id: svn://svn.berlios.de/openocd/trunk@2724 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* srst_gates_jtag option. at91sam9260 needs retesting, and possibly ↵oharboe2009-09-171-0/+4
| | | | | | srst_gates_jtag added to reset_config. Could i.MX27 be a case where srst does not pull trst, but really srst gates jtag clock? git-svn-id: svn://svn.berlios.de/openocd/trunk@2720 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* The "arm9tdmi.c" file is more of a generic ARM9 support file:dbrownell2009-09-171-4/+9
| | | | | | | | | | | - update comments to say so. - update docs to clarify that the "arm9tdmi" command prefix is a misnomer. - bugfix some messages that wrongly assume only ARM9TDMI based processors use this code. git-svn-id: svn://svn.berlios.de/openocd/trunk@2719 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Doc update: mention how ARM's WFI instruction affectsdbrownell2009-09-171-9/+56
| | | | | | | | | JTAG clocking by gating the core clock, and workarounds. Most details are with the "halt" command, which is one of the first places this issue will be noticed. git-svn-id: svn://svn.berlios.de/openocd/trunk@2718 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Rolf Meeser <rolfm_9dq@yahoo.de> adds flash support for NXP's LPC2900 family ↵oharboe2009-09-161-1/+132
| | | | | | (ARM968E). git-svn-id: svn://svn.berlios.de/openocd/trunk@2715 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Dirk Behme <dirk.behme@googlemail.com> document post TAP reset eventoharboe2009-09-121-4/+13
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2700 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* David Brownell <david-b@pacbell.net> oharboe2009-09-091-4/+14
| | | | | | | | | | | Fix docs on ARM11 MCR and MRC coprocessor commands: correct read-vs-write; and describe the params. (ARM920 and ARM926 have cp15-specific commands; this approach is more generic. MCR2, MRC2, MCRR, MCRR2, MRRC, and MRRC2 instructions could also get exposed.) git-svn-id: svn://svn.berlios.de/openocd/trunk@2679 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* David Brownell <david-b@pacbell.net> oharboe2009-09-081-0/+17
| | | | | | | | Provide an "armv7a disassemble" command. Current omissions include VFP (except as coprocessor instructions), Neon, and various Thumb2 opcodes that are not available in ARMv7-M processors. git-svn-id: svn://svn.berlios.de/openocd/trunk@2676 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* David Brownell <david-b@pacbell.net> Minor doc updates:oharboe2009-08-301-1/+15
| | | | | | | | | | | | - Itemize the list of private customization examples for openocd.cfg - Add "override defaults" as a customization, specifically for the work area (back it up or relocate it) - Highlight some work area location issues git-svn-id: svn://svn.berlios.de/openocd/trunk@2651 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* David Brownell <david-b@pacbell.net> start phasing out integers as target IDsoharboe2009-08-301-2/+8
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2650 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* David Brownell <david-b@pacbell.net> Tweak disassembly commands:oharboe2009-08-251-3/+6
| | | | | | | | | | | | | | | | | | For ARMv4/ARMv5: - better command parameter error checking - don't require an instruction count; default to one - recognize thumb function addresses - make function static - shorten some too-long lines For Cortex-M3: - don't require an instruction count; default to one With the relevant doc updates. --- Nyet done: invoke the thumb2 disassembler on v4/v5, to better handle branch instructions. git-svn-id: svn://svn.berlios.de/openocd/trunk@2624 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Michael Schwingen <rincewind@discworld.dascon.de> fix previous doc patchoharboe2009-08-251-2/+1
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2619 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Michael Schwingen <rincewind@discworld.dascon.de> The attached patch adds a ↵oharboe2009-08-251-0/+73
| | | | | | | | | "xscale vector_table" command that allows to set the values that are written in the mini-IC (plus documentation updates that describe why this is needed). git-svn-id: svn://svn.berlios.de/openocd/trunk@2613 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* - add cfg file for Amontec JTAGKey2 jtag interfacentfreak2009-08-181-0/+3
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2592 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* David Brownell <david-b@pacbell.net> Add "cortex_m3 vector_catch" command ↵oharboe2009-08-181-1/+32
| | | | | | | | | | | | | | | | and docs. One minor issue with this is that the core debug support uses this mechanism, then trashes its state over reset. Users can Work around that (for now) by re-assigning the desired config after reset. Also fixes "target halted due to target-not-halted" goof. When we can't describe the reason using OpenOCD's limited vocabulary, say "reason undefined" instead of saying it's not halted. git-svn-id: svn://svn.berlios.de/openocd/trunk@2588 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Audrius Urmanavičius [didele.deze@gmail.com]:ntfreak2009-08-131-4/+5
| | | | | | | Add flash programming support for NXP LPC1700 cortex_m3 based family git-svn-id: svn://svn.berlios.de/openocd/trunk@2579 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* David Brownell <david-b@pacbell.net>:ntfreak2009-08-071-1/+4
| | | | | | | Better explanation for the TAP "-ircapture" parameter. git-svn-id: svn://svn.berlios.de/openocd/trunk@2577 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* David Brownell <david-b@pacbell.net>:zwelch2009-07-151-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Initial support for disassembling Thumb2 code. This works only for Cortex-M3 cores so far. Eventually other cores will also need Thumb2 support ... but they don't yet support any kind of disassembly. - Update the 16-bit Thumb decoder: * Understand CPS, REV*, SETEND, {U,S}XT{B,H} opcodes added by ARMv6. (It already seems to treat CPY as MOV.) * Understand CB, CBNZ, WFI, IT, and other opcodes added by in Thumb2. - A new Thumb2 instruction decode routine is provided. * This has a different signature: pass the target, not the instruction, so it can fetch a second halfword when needed. The instruction size is likewise returned to the caller. * 32-bit instructions are recognized but not yet decoded. - Start using the current "UAL" syntax in some cases. "SWI" is renamed as "SVC"; "LDMIA" as "LDM"; "STMIA" as "STM". - Define a new "cortex_m3 disassemble addr count" command to give access to this disassembly. Sanity checked against "objdump -d" output; a bunch of the new instructions checked out fine. git-svn-id: svn://svn.berlios.de/openocd/trunk@2530 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* - fix small typo in documentationntfreak2009-07-141-1/+1
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2525 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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