Commit message (Collapse) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | Transform 'u8' to 'uint8_t' | zwelch | 2009-06-18 | 1 | -6/+6 |
| | | | | | | | | - Replace '\([^_]\)u8' with '\1uint8_t'. - Replace '^u8' with 'uint8_t'. git-svn-id: svn://svn.berlios.de/openocd/trunk@2276 b42882b7-edfa-0310-969c-e2dbd0fdcd60 | ||||
* | - added a PLD (programmable logic device) subsystem for FPGA, CPLD etc. ↵ | drath | 2006-11-22 | 1 | -0/+38 |
configuration - added support for loading .bit files into Xilinx Virtex-II devices - added support for the Gateworks GW16012 JTAG dongle - merged CFI fixes from XScale branch - a few minor fixes git-svn-id: svn://svn.berlios.de/openocd/trunk@116 b42882b7-edfa-0310-969c-e2dbd0fdcd60 |