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* arm7/9: enable check that DCC downloads have been enabledØyvind Harboe2010-01-131-0/+1
| | | | Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* ARM720: help/usage updatesDavid Brownell2010-01-071-10/+14
| | | | | | | | | | | | | Deprecate the "pass an instruction opcode" flavor of cp15 access in favor of the "arm mcr ..." and "arm mrc ..." commands, which offer fewer ways to break things. Use the same EBNF syntax in the code as for the user's guide. Update User's Guide to say where to find those magic values (which table in the ARM920 TRM). Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: don't clone arm_arch_state() codeDavid Brownell2009-12-071-8/+2
| | | | | | | | | | | Have various ARM cores delegate to arm_arch_state() to display basic information, instead of duplicating that logic. This shrinks the code, makes them all report when semihosting is active, and highlights which data are specific to this core. (Like ARM720 not having separate instruction and data caches.) Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: rename some generic routinesDavid Brownell2009-12-071-1/+1
| | | | | | | | | | | | | | | | Rename some (mostly) generic ARM functions: armv4_5_arch_state() --> arm_arch_state() armv4_5_get_gdb_reg_list() --> arm_get_gdb_reg_list() armv4_5_init_arch_info() --> arm_init_arch_info() Cores using the microcontroller profile may want a different arch_state() routine though. (Also fix strange indentation in arm_arch_state: use tabs only! And update a call to it, removing assignment-in-conditional.) Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: move opcode macros to <target/arm_opcodes.h>David Brownell2009-12-071-0/+1
| | | | | | | | | | | | | | | Move the ARM opcode macros from <target/armv4_5.h>, and a few Thumb2 ones from <target/armv7m.h>, to more appropriate homes in a new <target/arm_opcodes.h> file. Removed duplicate opcodes from that v7m/Thumb2 set. Protected a few macro argument references by adding missing parentheses. Tightening up some of the line lengths turned up a curious artifact: the macros for the Thumb opcodes are all 32 bits wide, not 16 bits. There's currently no explanation for why it's done that way... Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: remove mrc_opcode(), use MRC() or MCR()David Brownell2009-12-071-4/+16
| | | | | | | | | | | | Get rid of mrc_opcode() in favor of ARMV4_5_MRC() or, where arm*20t should have used it, ARMV4_5_MCR() instead. Basically, *writing* coprocessor registers shouldn't have used the *read* opcode ... and both should stick to standard opcode constructors, not rearranging parameter sequence any more than already needed. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: switch target_to_armv4_5() to target_to_arm()David Brownell2009-12-041-2/+2
| | | | | | And remove that old symbol. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: rename armv4_5_state_* as arm_state_*David Brownell2009-12-041-1/+1
| | | | | | And make arm_state_strings[] be const. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* change #include "time_support.h" to <helper/time_support.h>Zachary T Welch2009-12-031-1/+1
| | | | | | | | | | | | Changes from the flat namespace to heirarchical one. Instead of writing: #include "time_support.h" the following form should be used. #include <helper/time_support.h> The exception is from .c files in the same directory.
* target: "mcr" and "mrc" are ARM-specificDavid Brownell2009-12-011-2/+13
| | | | | | | | | | | | | | Switch "mrc" and "mcr" commands to be toplevel ARM operations, as they should initially have been. Correct the usage message for both commands: it matches ARM documentation (as one wants!) instead of reordering them to match the funky mrc() and mcr() method usage (sigh). For Cortex-A8: restore a line that got accidentally dropped, so the secure monitor mode shadow registers will show again. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* remove target_type register_command callbackZachary T Welch2009-11-241-9/+5
| | | | | | Uses chaining of command_registration structures to eliminate all target_type register_callback routines. Exports the command_handler registration arrays for those target types that are used by others.
* arm920t: use register_commands()Zachary T Welch2009-11-241-27/+47
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* use COMMAND_REGISTER macroZachary T Welch2009-11-241-6/+6
| | | | | Replaces direct calls to register_command() with a macro, to allow its parameters to be changed and callers updated in phases.
* ARM: use arm_reg_current()David Brownell2009-11-221-26/+40
| | | | | | | | | | Start using the arm_reg_current() call. This shrinks and speeds the affected code. It can also prevent some coredumps coming from invalid CPSR values ... the ARMV4_5_CORE_REG_MODE() macro returns bogus registers if e.g. "Secure Monitor" mode isn't supported by the current CPU. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: remove 'armv4_5_common_s' migration #defineDavid Brownell2009-11-221-6/+6
| | | | | | Finish migrating from the old symbol to the new one. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: arm_set_cpsr() handles T and J bitsDavid Brownell2009-11-221-1/+0
| | | | | | | | | | | | | | Have arm_set_cpsr() handle the two core state flags, updating the CPU state. This eliminates code in various debug_entry() paths, and marginally improves handling of the J bit. Catch and comment a few holes in the handling of the J bit on ARM926ejs cores ... it's unlikely our users will care about Jazelle mode, but we can at least warn of Impending Doom. If anyone does use it, these breadcrumbs may help them to find the right path through the code. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: define two register utilitiesDavid Brownell2009-11-221-5/+7
| | | | | | | | | | | | | | Define arm_reg_current() ... returning handle to a given register, and encapsulating the current mode's register shadowing. It's got one current use, for reporting the current register set to GDB. This will let later patches clean up much ARMV4_5_CORE_REG_MODE() nastiness, saving a bit of code. Define and use arm_set_cpsr() ... initially it updates the cached CPSR and sets up state used by arm_reg_current(), plus any SPSR handle. (Later: can also set up for T and J bits.) Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: simplify CPSR handlingDavid Brownell2009-11-221-4/+4
| | | | | | | | | | | | | | Stash a pointer to the CPSR in the "struct arm", to help get rid of the (common) references to its index in the register cache. This removes almost all references to CPSR offsets outside of the toplevel ARM code ... except a pair related to the current ARM11 "simulator" logic (which should be removable soonish). This is a net minor code shrink of a few hundred bytes of object code, and also makes the code more readable. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: add is_arm_mode()David Brownell2009-11-171-4/+4
| | | | | | | | | | | | | | | | | | Add a new is_arm_mode() predicate, and use it to replace almost all calls to current armv4_5_mode_to_number(). Eventually those internal mode numbers should vanish... along with their siblings in the armv7a.c file. Remove a handful of superfluous checks ... e.g. the mode number was just initialized, or (debug entry methods) already validated. Move one of the macros using internal mode numbers into the only file which uses that macro. Make the tables manipulated with those numbers be read-only and, where possible, static so they're not confused with part of the generic ARM interface. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: add arm_mode_name()David Brownell2009-11-171-1/+1
| | | | | | | | | | | | | | | Add and use arm_mode_name() to map from PSR bits to user meaningful names. It uses a new table which, later, can be used to hold other mode-coupled data. Add definitions for the "Secure Monitor" mode, as seen on some ARM11 cores (like ARM1176) and on Cortex-A8. The previous mode name scheme didn't understand that mode. Remove the old mechanism ... there were two copies, caused by Cortex-A8 needing to add "Secure Monitor" mode support. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* command_handler: change 'cmd_ctx' to CMD_CTXZachary T Welch2009-11-171-28/+28
| | | | Convert all command handler 'cmd_ctx' parameter usage with CMD_CTX.
* command_handler: change 'args' to CMD_ARGVZachary T Welch2009-11-171-10/+10
| | | | | This patch converts all instances of 'args' in COMMAND_HANDLER routines to use CMD_ARGV macro.
* command_handler: change to 'argc' to CMD_ARGCZachary T Welch2009-11-171-9/+9
| | | | | This patch converts all instances of 'argc' in COMMAND_HANDLER routines to use CMD_ARGC.
* ARM9TDMI: remove now-needless "struct arm9tdmi"David Brownell2009-11-171-9/+7
| | | | | | | And move the rest of the vector_catch stuff into the C file; it's not part of the module interface. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* target: no implicit #includes of "register.h"David Brownell2009-11-161-0/+1
| | | | | | | | | | | | Same deal: "register.h" got needlessly included all over the place because of being in a few widely included headers. So take it out of the header files which included it, and put it in files which use it ... reduce needless interdependencies. Also, don't need that extra "types.h" inclusion. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: memory utils aren't ARM7/ARM9 dependentDavid Brownell2009-11-151-2/+3
| | | | | | | | | | | | | | | | The arm7_9_checksum_memory() and arm7_9_blank_check_memory() routines are not actually specific to the ARM7 and ARM9 core generations ... they can work for any core which can run algorithms using basic ARM (not Thumb) instructions. Rename them; move the declarations to a more generic site; likewise move the code (and tidy it a bit in the process). NOTE: the blank_check() method falsely returned a success status (0) on one error path, when the algorithm failed. Fixed this bug. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM7/ARM9: use shared examine() methodDavid Brownell2009-11-131-1/+1
| | | | | | | | | No point in having two identical examine methods for the ARM7TDMI and ARM9TDMI drivers; move, rename, shrink, share. Add a bit of doxygen; stop needlessly exporting a method. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* command_t -> struct commandZachary T Welch2009-11-131-1/+1
| | | | Remove misleading typedef and redundant suffix from struct command.
* command_context_t -> struct command_contextZachary T Welch2009-11-131-2/+2
| | | | Remove misleading typedef and redundant suffix from struct command_context.
* target_t -> struct targetZachary T Welch2009-11-131-27/+27
| | | | Remove misleading typedef and redundant suffix from struct target.
* reg_t -> struct regZachary T Welch2009-11-131-1/+1
| | | | Remove misleading typedef and redundant suffix from struct reg.
* target_type_t -> struct target_typeZachary T Welch2009-11-131-1/+1
| | | | Remove misleading typedef and redundant suffix from struct target_type.
* arm_jtag_t -> struct arm_jtagZachary T Welch2009-11-131-3/+3
| | | | Remove misleading typedef and redundant suffix from struct arm_jtag.
* arm9tdmi_common_t -> struct arm9tdmi_commonZachary T Welch2009-11-131-1/+1
| | | | Remove misleading typedef and redundant suffix from struct arm9tdmi_common.
* arm920t_tlb_entry_t -> struct arm920t_tlb_entryZachary T Welch2009-11-131-1/+1
| | | | Remove misleading typedef and redundant suffix from struct arm920t_tlb_entry.
* arm920t_cache_line_t -> struct arm920t_cache_lineZachary T Welch2009-11-131-1/+1
| | | | Remove misleading typedef and redundant suffix from struct arm920t_cache_line.
* arm7_9_common_t -> struct arm7_9_commonZachary T Welch2009-11-131-4/+4
| | | | Remove misleading typedef and redundant suffix from struct arm7_9_common.
* arm920t_common_t -> struct arm920t_commonZachary T Welch2009-11-131-18/+18
| | | | Remove misleading typedef and redundant suffix from struct arm920t_common.
* scan_field_t -> struct scan_fieldZachary T Welch2009-11-131-3/+3
| | | | Remove useless structure typedef.
* jtag_tap_t -> struct jtag_tapZachary T Welch2009-11-131-1/+1
| | | | | Search and destroy the jtag_tap_t typedef. This also cleans up a layering violation, removing the declaration from types.h.
* add CMD_NAME macro for command handlersZachary T Welch2009-11-131-2/+2
| | | | | By introducing the CMD_NAME macro, this parameter may be integrated as args[-1] in command.[ch], without touching any other call sites.
* use COMMAND_HANDLER macro to define all commandsZachary T Welch2009-11-131-10/+5
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* ARM920: implement basic MMU opsDavid Brownell2009-11-101-0/+22
| | | | | | mmu() works; virt2phys() fails and logs an error. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM920 uses the new inheritance/nesting schemeDavid Brownell2009-11-051-140/+71
| | | | | | | | Use target_to_arm920(), replacing needless pointer traversals and simplifying. Stop setting arm9tdmi->arch_info for arm920 type parts, it's not used any longer. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM920: remove exports and forward declsDavid Brownell2009-11-051-107/+141
| | | | | | | | | | | | | | | Unneeded exports cause confusion about the module interfaces. Make most functions static. Add a short header comment. The forward decls are just code clutter; remove them, by moving their references after definitions. This is another file which never needed even one internal forward declaration. This saved almost 900 bytes of code on x86_32; it seems the compiler can leverage its knowledge that these functions are not called from the outside world... Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* Improve arm920t command argument parsing.Zachary T Welch2009-11-051-6/+12
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* arm920t: add mrcmcr interface fn's.Øyvind Harboe2009-11-051-0/+29
| | | | | | | | The arm920t has a concept of read modify write cycles that may have to be represented in the mrcmcr interface eventually. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* target: remove unused interface fn that clutters codeØyvind Harboe2009-11-051-7/+0
| | | | | | | | | The quit entry point was not being invoked. Just a source of confusion at this point. XScale ran 100x reset upon quit, but that code made no sense, wasn't commented and never invoke. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* arm920t: memory writes were broken when MMU was disabledØyvind Harboe2009-11-031-11/+10
| | | | | | | | | | | To support breakpoints, flush data cache line and invalidate instruction cache when 4 and 2 byte words are written. The previous code was trying to write directly to the physical memory, which was buggy and had a number of other situations that were not handled. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* retire obsolete mXY_phys commands. Handled by generic memory read/modify ↵Øyvind Harboe2009-10-211-62/+0
| | | | commands and target read/write physical memory callbacks.
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