| Commit message (Collapse) | Author | Age | Files | Lines |
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Rename some (mostly) generic ARM functions:
armv4_5_arch_state() --> arm_arch_state()
armv4_5_get_gdb_reg_list() --> arm_get_gdb_reg_list()
armv4_5_init_arch_info() --> arm_init_arch_info()
Cores using the microcontroller profile may want a different
arch_state() routine though.
(Also fix strange indentation in arm_arch_state: use tabs only!
And update a call to it, removing assignment-in-conditional.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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Move the ARM opcode macros from <target/armv4_5.h>, and a few
Thumb2 ones from <target/armv7m.h>, to more appropriate homes
in a new <target/arm_opcodes.h> file.
Removed duplicate opcodes from that v7m/Thumb2 set. Protected
a few macro argument references by adding missing parentheses.
Tightening up some of the line lengths turned up a curious artifact:
the macros for the Thumb opcodes are all 32 bits wide, not 16 bits.
There's currently no explanation for why it's done that way...
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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And remove that old symbol.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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Uses chaining of command_registration structures to eliminate all
target_type register_callback routines. Exports the command_handler
registration arrays for those target types that are used by others.
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Replaces direct calls to register_command() with a macro, to allow
its parameters to be changed and callers updated in phases.
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Finish migrating from the old symbol to the new one.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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Implementations need to access the register struct they modify;
make it easier and less error-prone to identify the instance.
(This removes over 10% of the ARMV4_5_CORE_REG_MODE nastiness...)
Plus some minor fixes noted when making these updates: ARM7/ARM9
accessor methods should be static; don't leave CPSR wrongly marked
"dirty"; note significant XScale omissions in register handling;
and have armv4_5_build_reg_cache() record its result.
Rename "struct armv4_5_core_reg" as "struct arm_reg"; it's used
for more than those older architecture generations.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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Convert all command handler 'cmd_ctx' parameter usage with CMD_CTX.
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This patch converts all instances of 'args' in COMMAND_HANDLER routines
to use CMD_ARGV macro.
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This patch converts all instances of 'argc' in COMMAND_HANDLER routines
to use CMD_ARGC.
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And move the rest of the vector_catch stuff into the C file;
it's not part of the module interface.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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Same deal: "register.h" got needlessly included all over the
place because of being in a few widely included headers.
So take it out of the header files which included it, and put
it in files which use it ... reduce needless interdependencies.
Also, don't need that extra "types.h" inclusion.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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The arm7_9_checksum_memory() and arm7_9_blank_check_memory()
routines are not actually specific to the ARM7 and ARM9 core
generations ... they can work for any core which can run
algorithms using basic ARM (not Thumb) instructions.
Rename them; move the declarations to a more generic site;
likewise move the code (and tidy it a bit in the process).
NOTE: the blank_check() method falsely returned a success
status (0) on one error path, when the algorithm failed.
Fixed this bug.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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No point in having two identical examine methods for the
ARM7TDMI and ARM9TDMI drivers; move, rename, shrink, share.
Add a bit of doxygen; stop needlessly exporting a method.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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Return NULL from etm_build_reg_cache() not ERROR_OK; and share
code on that fault path.
Let ETM code handle any tracking of its cache -- not callers.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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Remove misleading typedef and redundant suffix from struct command.
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Remove misleading typedef and redundant suffix from struct command_context.
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Remove misleading typedef and redundant suffix from struct target.
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Remove misleading typedef and redundant suffix from struct reg.
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Remove misleading typedef and redundant suffix from struct target_type.
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Remove misleading typedef and just use struct arm.
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Remove misleading typedef and redundant suffix from struct arm9tdmi_vector.
Renames enum arm9tdmi_vector as enum arm9tdmi_vector_bit.
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Remove misleading typedef and redundant suffix from struct reg_cache.
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Remove misleading typedef and redundant suffix from struct arm_jtag.
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Remove misleading typedef and redundant suffix from struct arm9tdmi_common.
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Remove misleading typedef and redundant suffix from struct arm7_9_common.
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Remove useless structure typedef.
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Search and destroy the jtag_tap_t typedef. This also cleans up a
layering violation, removing the declaration from types.h.
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The number of command arguments will always be 0 or more, so use
the right type in handlers. This has a cascading effect up through
the layers, but the new COMMAND_HANDLER macros prevented total chaos.
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Make ARM7 and ARM9 cores use the new toplevel ETM handle to
trigger ETM setup, not the to-be-removed lower level one.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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Replace needless pointer traversals and simplify. Also remove most
remaining contents from arm9tdmi struct; it's almost removable.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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The forward decls are just code clutter; remove them, by moving
their references after definitions. This is another file which
never needed even one internal forward declaration.
Also shrink a few overly-long lines with function declarations
or definitions.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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The quit entry point was not being invoked. Just a source
of confusion at this point. XScale ran 100x reset upon
quit, but that code made no sense, wasn't commented
and never invoke.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
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Removing unused code makes it much less mysterius.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
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Just use the array of names we're given, ignoring indices.
The "reserved means don't use" patch missed that change.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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And update doc accordingly. That EmbeddedICE register was
introduced for ARM9TDMI and then carried forward into most
new chips that use EmbeddedICE.
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Bit 5 shouldn't be used. Remove all support for modifying it.
Matches the exception vector table, of course ... more than one
bootloader uses that non-vector to help distinguish valid boot
images from random garbage in flash.
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git-svn-id: svn://svn.berlios.de/openocd/trunk@2765 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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- update comments to say so.
- update docs to clarify that the "arm9tdmi" command prefix
is a misnomer.
- bugfix some messages that wrongly assume only ARM9TDMI
based processors use this code.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2719 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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Optionally shave time off the armv4_5 run_algorithm() code: let
them terminate using software breakpoints, avoiding roundtrips
to manage hardware ones.
Enable this by using BKPT to terminate execution instead of "branch
to here" loops. Then pass zero as the exit address, except when
running on an ARMv4 core. ARM7TDMI, ARM9TDMI, and derived cores
now set a flag saying they're ARMv4.
Use that mechanism in arm_nandwrite(), for about 3% speedup on a
DaVinci ARM926 core; not huge, but it helps. Some other algorithms
could use this too (mostly flavors of flash operation).
git-svn-id: svn://svn.berlios.de/openocd/trunk@2680 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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handling ... don't use parallel
arrays (error prone) or assume all registers are 32-bits wide (they can
have fewer bits); don't use spaces in register names, so they can be
passed more easily to the "reg" command.
Minor updates for ARM9 vector_catch support: it's an 8-bit value. This
seems to help this core's vector_catch command work a bit better; but its
behavior wih the register cache is still goofy.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2587 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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- Replace '[ \t]*[)]' with ')'.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2377 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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- Replace '([ \t]*' with '('.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2376 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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- Replace ')\(+\)(' with ') \1 ('.
- Replace ')\(+\)\(\w\)' with ') \1 \2'.
- Replace '\(\w\)\(+\)(' with '\1 \2 ('.
- Replace '\(\w\)\(+\)\(\w\)' with '\1 \2 \3'.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2373 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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- Replace ')\(=\)\(\w\)' with ') \1 \2'.
- Replace '\(\w\)\(=\)(' with '\1 \2 ('.
- Replace '\(\w\)\(=\)\(\w\)' with '\1 \2 \3'.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2372 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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- Replace ')\(==\)\(\w\)' with ') \1 \2'.
- Replace '\(\w\)\(==\)\(\w\)' with '\1 \2 \3'.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2371 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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