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path: root/src/target/arm_disassembler.h
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* target_t -> struct targetZachary T Welch2009-11-131-1/+1
| | | | Remove misleading typedef and redundant suffix from struct target.
* arm_instruction_t -> struct arm_instructionZachary T Welch2009-11-131-6/+6
| | | | Remove misleading typedef and redundant suffix from struct arm_instruction.
* arm_load_store_multiple_instr_t -> struct arm_load_store_multiple_instrZachary T Welch2009-11-131-3/+3
| | | | Remove misleading typedef and redundant suffix from struct arm_load_store_multiple_instr.
* arm_load_store_instr_t -> struct arm_load_store_instrZachary T Welch2009-11-131-3/+3
| | | | Remove misleading typedef and redundant suffix from struct arm_load_store_instr.
* arm_data_proc_instr_t -> struct arm_data_proc_instrZachary T Welch2009-11-131-3/+3
| | | | Remove misleading typedef and redundant suffix from struct arm_data_proc_instr.
* arm_b_bl_bx_blx_instr_t -> struct arm_b_bl_bx_blx_instrZachary T Welch2009-11-131-3/+3
| | | | Remove misleading typedef and redundant suffix from struct arm_b_bl_bx_blx_instr.
* src/target: remove 'extern' and wrap headersZachary T Welch2009-11-091-4/+6
| | | | Remove extern keywords from function prototypes and wrap long lines.
* David Brownell <david-b@pacbell.net>:zwelch2009-07-151-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Initial support for disassembling Thumb2 code. This works only for Cortex-M3 cores so far. Eventually other cores will also need Thumb2 support ... but they don't yet support any kind of disassembly. - Update the 16-bit Thumb decoder: * Understand CPS, REV*, SETEND, {U,S}XT{B,H} opcodes added by ARMv6. (It already seems to treat CPY as MOV.) * Understand CB, CBNZ, WFI, IT, and other opcodes added by in Thumb2. - A new Thumb2 instruction decode routine is provided. * This has a different signature: pass the target, not the instruction, so it can fetch a second halfword when needed. The instruction size is likewise returned to the caller. * 32-bit instructions are recognized but not yet decoded. - Start using the current "UAL" syntax in some cases. "SWI" is renamed as "SVC"; "LDMIA" as "LDM"; "STMIA" as "STM". - Define a new "cortex_m3 disassemble addr count" command to give access to this disassembly. Sanity checked against "objdump -d" output; a bunch of the new instructions checked out fine. git-svn-id: svn://svn.berlios.de/openocd/trunk@2530 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Remove whitespace at end of lines, step 1.zwelch2009-06-231-15/+15
| | | | | | | - Replace '\s*$' with ''. git-svn-id: svn://svn.berlios.de/openocd/trunk@2379 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* - Fixes '>>' whitespacezwelch2009-06-231-1/+1
| | | | | | | | | - Replace ')\(>>\)\(\w\)' with ') \1 \2'. - Replace '\(\w\)\(>>\)(' with '\1 \2 ('. - Replace '\(\w\)\(>>\)\(\w\)' with '\1 \2 \3'. git-svn-id: svn://svn.berlios.de/openocd/trunk@2369 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Transform 'u32' to 'uint32_t' in src/target/arm*zwelch2009-06-181-7/+7
| | | | | | | | - Replace '\([^_]\)u32' with '\1uint32_t'. - Replace '^u32' with 'uint32_t'. git-svn-id: svn://svn.berlios.de/openocd/trunk@2278 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Transform 'u16' to 'uint16_t'zwelch2009-06-181-1/+1
| | | | | | | | - Replace '\([^_]\)u16' with '\1uint16_t'. - Replace '^u16' with 'uint16_t'. git-svn-id: svn://svn.berlios.de/openocd/trunk@2277 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Transform 'u8' to 'uint8_t' in src/targetzwelch2009-06-181-19/+19
| | | | | | | | - Replace '\([^_]\)u8' with '\1uint8_t'. - Replace '^u8' with 'uint8_t'. git-svn-id: svn://svn.berlios.de/openocd/trunk@2274 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* - added manpage for OpenOCD (thanks to Uwe Hermann)drath2007-06-141-0/+1
| | | | | | | | | | - fixed bug in ARM926EJ-S cache handling that caused cache linefills to be disabled after first debug entry - added support for auto image type detection (thanks to Vincent Palatin) - further work on ETM trace decoding (tested with a ETB interface using an ETM in normal 16-bit port mode, still experimental) git-svn-id: svn://svn.berlios.de/openocd/trunk@169 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* - split fileio handling into fileio part and image handlingdrath2007-05-291-2/+3
| | | | | | | | | | | - reworked etm/etb into a generic etm part with trace capture drivers (currently only etb supported) - added XScale debug handler binary to repository - added Thumb disassembling (thanks to Vincent Palatin for this patch) - added support for non-CFI compatible flashes to cfi driver (currently only SST39VFxxx devices supported) This checkin is experimental, not suitable for general use git-svn-id: svn://svn.berlios.de/openocd/trunk@155 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* - merged XScale branch back into trunkdrath2007-03-281-17/+19
| | | | | | | | | - fixed some compiler warnigns in amt_jtagaccel.c, bitbang.c, parport.c - free working area and register stuff if str7x block write algorithm failed - check PC after exiting a target algorithm in armv4_5.c git-svn-id: svn://svn.berlios.de/openocd/trunk@135 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* - keep additional information for decoded instructionsdrath2006-06-161-3/+64
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@69 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* - the 'help' command now takes an optional argument to display help only on ↵drath2006-06-121-0/+138
a certain command (thanks to Andrew Dyer for this enhancement) - OpenOCD now includes the ability to diassemble instructions on its own (only ARM for now, Thumb might follow). The command is "armv4_5 disassemble <address> <count> ['thumb']" (thumb is currently unsupported). I've compared the produced disassembly against GDB/GNU Objdump output, and it seems to be correct, but there may still be some bugs left. git-svn-id: svn://svn.berlios.de/openocd/trunk@68 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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