summaryrefslogtreecommitdiff
path: root/src/target/armv4_5.h
Commit message (Collapse)AuthorAgeFilesLines
* ETM: remove old mid-level ETM handleDavid Brownell2009-11-111-0/+1
| | | | | | | | | | | | | | | | | | Now that nothing uses the old ETM handle any more, remove it. Add minimal header tweaks, letting non-ARM7 and non-ARM9 cores access ETM facilities. Now ARM11 could support standard ETM (and ETB) access as soon as it derives from "struct arm" ... its scanchain 6 is used access the ETM, just like ARM7 and ARM9. The Cortex parts (both M3 and A8) will need modified access methods (via ETM init parameters), so they use the DAP. Our first A8 target (OMAP3) needs that for both ETM and ETB, but the M3 ETM isn't very useful without SWO trace support (it's painfully stripped down), so that support won't be worth adding for a while. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: start generalized base typeDavid Brownell2009-11-111-5/+31
| | | | | | | | | | | | | | | | Rename "struct armv4_5_common_s" as "struct arm". It needs a bit more work to be properly generic, and to move out of this header, but it's the best start we have on that today. Add and initialize an optional ETM pointer, since that will be the first thing that gets generalized. The intent being: all ARMs should eventually derive from this "struct arm", so they can reuse the current ETM logic. (And later, more.) Currently the ARM cores that *don't* so derive are only ARMv7-M (and thus Cortex-M3) and ARM11. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* src/target: remove 'extern' and wrap headersZachary T Welch2009-11-091-7/+13
| | | | Remove extern keywords from function prototypes and wrap long lines.
* target: provide container_of()David Brownell2009-11-051-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | Provide a cleaner way to handle single inheritance of targets in C, using the same model Linux does: structs containing other structs, un-nested via calls to a "container_of()" macro that are packaged in typesafe inline functions. Targets already use this containment idiom, but make it much more complicated because they un-nest using embedded "void *" pointers ... in chains of up to five per target, which is all pure needless complication. (Example: arm92x core, arm9tdmi, arm7_9, armv4_5 ... on top of the base "target" class.) Applying this scheme consistently simplifies things, and gets rid of many error-prone untyped pointers. It won't change any part of the type model though -- it just simplifies things. (And facilitates more cleanup later on.) Rule of thumb: where there's an X->arch_info void* pointer, access to that pointer can and should be removed. It may be convenient to set up pointers to some of the embedded structs; and shrink their current "*_common" names (annoyingly long). Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* mcr/mrc interface work. Implemented for arm926ejs and arm720t. mcr/mrc ↵Øyvind Harboe2009-10-231-0/+18
| | | | commands added.
* portability updatesDavid Brownell2009-10-141-1/+1
| | | | | | | | | Based on some patches from <redirect.slash.nil@gmail.com> for preliminary Win64 compilation. More such updates are needed, but they need work. Compile tested on 64 and 32 bit Linuxes, and Cygwin. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* David Brownell <david-b@pacbell.net> oharboe2009-09-091-0/+1
| | | | | | | | | | | | | | | | | Optionally shave time off the armv4_5 run_algorithm() code: let them terminate using software breakpoints, avoiding roundtrips to manage hardware ones. Enable this by using BKPT to terminate execution instead of "branch to here" loops. Then pass zero as the exit address, except when running on an ARMv4 core. ARM7TDMI, ARM9TDMI, and derived cores now set a flag saying they're ARMv4. Use that mechanism in arm_nandwrite(), for about 3% speedup on a DaVinci ARM926 core; not huge, but it helps. Some other algorithms could use this too (mostly flavors of flash operation). git-svn-id: svn://svn.berlios.de/openocd/trunk@2680 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* more debug output for translation of arm mode number to enumoharboe2009-07-061-1/+1
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2481 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* a bit more debug output for translation of invalid mode numbersoharboe2009-07-061-1/+1
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2480 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* - Fixes '=' whitespacezwelch2009-06-231-4/+4
| | | | | | | | | - Replace ')\(=\)\(\w\)' with ') \1 \2'. - Replace '\(\w\)\(=\)(' with '\1 \2 ('. - Replace '\(\w\)\(=\)\(\w\)' with '\1 \2 \3'. git-svn-id: svn://svn.berlios.de/openocd/trunk@2372 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Transform 'u32' to 'uint32_t' in src/target/arm*zwelch2009-06-181-2/+2
| | | | | | | | - Replace '\([^_]\)u32' with '\1uint32_t'. - Replace '^u32' with 'uint32_t'. git-svn-id: svn://svn.berlios.de/openocd/trunk@2278 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* David Brownell <david-b@pacbell.net> whitespace fixes.oharboe2009-05-101-16/+16
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@1690 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Remove redundant declarations to allow building with -Wredundant-decls.zwelch2009-04-291-1/+0
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@1560 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Zach Welch <zw@superlucidity.net> use ARM4_5_MODE_ANY instead of -1oharboe2009-04-191-1/+1
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@1474 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* - remove target specific variant and use target->variant memberntfreak2008-12-131-1/+0
| | | | | | | - fix build warning in cortex_m3 - code cleanup - remove trailing lf and convert c++ comments git-svn-id: svn://svn.berlios.de/openocd/trunk@1238 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* - added myself to copyright on files i remember adding large contributions ↵ntfreak2008-09-201-0/+3
| | | | | | | | | for over the years - cleaned up headers to match rest of code - added missing svn props for previously added files git-svn-id: svn://svn.berlios.de/openocd/trunk@987 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* fix mode output when illegal arm mode is detected. Now prints illegal mode ↵oharboe2008-05-191-1/+1
| | | | | | for index -1. git-svn-id: svn://svn.berlios.de/openocd/trunk@664 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* This matters for embedded devices, but is probably not observably better for ↵oharboe2008-05-071-2/+39
| | | | | | PC hosted OpenOCD. git-svn-id: svn://svn.berlios.de/openocd/trunk@647 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* - fixed target->type->poll() return valueoharboe2008-02-241-1/+1
| | | | | | | | | | | - added arch_state to show status of currently selected target - simplified target->type->arch_state() api. - clean up telnet output a bit - fixed GDB output for arch_state - removed a couple of unecessary exit()'s - cleaned up error propagation a bit in a few places git-svn-id: svn://svn.berlios.de/openocd/trunk@332 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* - split fileio handling into fileio part and image handlingdrath2007-05-291-4/+4
| | | | | | | | | | | - reworked etm/etb into a generic etm part with trace capture drivers (currently only etb supported) - added XScale debug handler binary to repository - added Thumb disassembling (thanks to Vincent Palatin for this patch) - added support for non-CFI compatible flashes to cfi driver (currently only SST39VFxxx devices supported) This checkin is experimental, not suitable for general use git-svn-id: svn://svn.berlios.de/openocd/trunk@155 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* - merged XScale branch back into trunkdrath2007-03-281-0/+10
| | | | | | | | | - fixed some compiler warnigns in amt_jtagaccel.c, bitbang.c, parport.c - free working area and register stuff if str7x block write algorithm failed - check PC after exiting a target algorithm in armv4_5.c git-svn-id: svn://svn.berlios.de/openocd/trunk@135 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* - add missing parentheses around macro parameters (thanks to Matthias Bauch ↵drath2007-02-031-23/+23
| | | | | | for noticing this bug and providing a fix) git-svn-id: svn://svn.berlios.de/openocd/trunk@130 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* - added debug output for D/I FSR and FAR (arm920t)drath2006-09-041-1/+12
| | | | | | | - fixed bug that caused CPSR to be corrupted in Thumb mode git-svn-id: svn://svn.berlios.de/openocd/trunk@93 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* - endianess fixes everywhere but in the flash code. flashing might still be ↵drath2006-08-311-0/+21
| | | | | | | | | | | | | | | | | broken on big-endian targets and/or hosts - added access to ARM920T vector catch register (via generic register mechanism) - don't disable linefills on ARM920T cores - this lead to lockups when accessing lines already contained in cache - read content of ARM920T cache and tlb into file (arm920t read_flash/read_mmu commands) - memory reading improved on ARM7/9, can be further accelerated with new "arm7_9 fast_memory_access enable" command (renamed from fast_writes) - made in_handler independent from in field (makes the handler more flexible) - added timeout to ft2232 when using D2XX library - fixed STR7x protection bit handling on second bank (thanks to Bernard) - added support for using the OpenOCD on AT91RM9200 systems (thanks to Anders Larsen) - fixed AT91SAM7 flash handling when not running from 32kHz clock (thanks to Anders Larsen) git-svn-id: svn://svn.berlios.de/openocd/trunk@90 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* - prepare OpenOCD for branching, created ./trunk/drath2006-06-021-0/+237
git-svn-id: svn://svn.berlios.de/openocd/trunk@64 b42882b7-edfa-0310-969c-e2dbd0fdcd60
generated by cgit v1.2.3 (git 2.46.0) at 2024-11-02 05:32:28 +0000