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* target: remove unused "bitfield" infrastructureDavid Brownell2009-11-131-21/+10
| | | | | | | | | | | | | | We have too many different registers, and too many version and context dependent interpretations, for this type of bitfield management to be scalable. (Anyone who really wants bitfield interpretation *can* do that in Tcl code...) There are ... quite a few copies of the same ARM dummy registers. There should eventually be one copy; this many is craziness. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* command_t -> struct commandZachary T Welch2009-11-131-2/+2
| | | | Remove misleading typedef and redundant suffix from struct command.
* command_context_t -> struct command_contextZachary T Welch2009-11-131-1/+1
| | | | Remove misleading typedef and redundant suffix from struct command_context.
* target_t -> struct targetZachary T Welch2009-11-131-8/+8
| | | | Remove misleading typedef and redundant suffix from struct target.
* reg_t -> struct regZachary T Welch2009-11-131-1/+1
| | | | Remove misleading typedef and redundant suffix from struct reg.
* arm_instruction_t -> struct arm_instructionZachary T Welch2009-11-131-1/+1
| | | | Remove misleading typedef and redundant suffix from struct arm_instruction.
* bitfield_desc_t -> struct bitfield_descZachary T Welch2009-11-131-1/+1
| | | | Remove misleading typedef and redundant suffix from struct bitfield_desc.
* armv7a_core_reg_t -> struct armv7a_core_regZachary T Welch2009-11-131-1/+1
| | | | Remove misleading typedef and redundant suffix from struct armv7a_core_reg.
* armv7a_common_t -> struct armv7a_commonZachary T Welch2009-11-131-7/+7
| | | | Remove misleading typedef and redundant suffix from struct armv7a_common.
* swjdp_common_t -> struct swjdp_commonZachary T Welch2009-11-131-5/+5
| | | | Remove misleading typedef and redundant suffix from struct swjdp_common.
* arm_adi,armv7[am]: use COMMAND_HELPER for helpersZachary T Welch2009-11-131-4/+4
| | | | | Rewrites the dap_* command helpers to use the COMMAND_HELPER paradigm. Uses CALL_COMMAND_HELPER to hide inherited calling conventions.
* use COMMAND_HANDLER macro to define all commandsZachary T Welch2009-11-131-13/+6
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* Cortex-A8: use the new inheritance/nesting schemeDavid Brownell2009-11-051-18/+10
| | | | | | | Use target_to_armv7a() etc, replacing needless pointer traversals. Stop using X->arch_info scheme in most ARMv7-A and Cortex-A8 code. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* Improve armv7a command argument parsing.Zachary T Welch2009-11-051-5/+12
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* Cleanup: nuke trailling whitespacesYauheni Kaliuta2009-10-131-3/+3
| | | | Signed-off-by: Yauheni Kaliuta <y.kaliuta@gmail.com>
* ARMv7A: Report fault status registers when in Abort statemlu2009-10-011-0/+23
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2789 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Updated mode string list.mlu2009-09-151-2/+2
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2713 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Report correct core instruction state for ARMv/A targetsmlu2009-09-081-1/+1
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2678 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* David Brownell <david-b@pacbell.net> oharboe2009-09-081-0/+86
| | | | | | | | Provide an "armv7a disassemble" command. Current omissions include VFP (except as coprocessor instructions), Neon, and various Thumb2 opcodes that are not available in ARMv7-M processors. git-svn-id: svn://svn.berlios.de/openocd/trunk@2676 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* - fix build warningsntfreak2009-08-251-1/+1
| | | | | | - add svn props to recently added files armv7a.[ch] git-svn-id: svn://svn.berlios.de/openocd/trunk@2618 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* David Brownell Subset of Cortex-A8 support from Magnus: create an armv7a fileoharboe2009-08-251-0/+301
and seed it with DAP access support using the current ADIv5 code. (With tweaks and cleanup from Øyvind and Dave.) The ARMv7-AR architecture manual is not publicly available (even in subset form like the ARMv7-M spec), so it's hard to distinguish between the Cortex-A8 implementation and the ARMv7-A architecture. The register set presumably is architectural, and so it's stored here; it's like earlier ARMs, with small additions. Ditto the instruction set, though Thumb2 support is used (extending Thumb support from ARMv6 with more 32-bit instructions) and there's this ThumbEE thing too. There is a new "debug monitor" mode, not yet fully addressed here, to support debugging in environments (like motor control) where halting debug mode is inadvisable. git-svn-id: svn://svn.berlios.de/openocd/trunk@2608 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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