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* use COMMAND_PARSE_ENABLE macro where appropriateZachary T Welch2009-11-183-96/+31
| | | | | | | | Updates all command parsing of simple "enable" and "disable" arguments. A few case in the tree use a tri-state or extended arguments, which cannot use this simple macro. Simlifies the xscale icache/dcache command handler logic.
* use COMMAND_PARSE_ON_OFF where appropriateZachary T Welch2009-11-182-26/+10
| | | | Updates all command parsing of "on" and "off" arguments.
* ARM: rework "arm reg" output for new modeDavid Brownell2009-11-181-35/+113
| | | | | | | | | | | | | | | | Change the layout to show the "Secure Monitor" registers too, when they're present. Instead of lining registers for each of six (or seven) modes up in adjacent vertical columns, display each mode's registers (or shadows) in a single block, avoiding duplicate value displays. This also lets us shrink the line length to fits in standard 80 character lines ... six or seven 18-character columns can't fit. Relabel "r13" as "sp", so it's more meaningful. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* Cortex-A8: xPSR handling updatesDavid Brownell2009-11-181-17/+20
| | | | | | | | | | When we read the CPSR on debug entry, update the CPSR cache in all cases, not just when the current processor state is User or System. Plus minor cleanup of how the (too-many) other registers' cache entries get updated. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: add a default full_context() methodDavid Brownell2009-11-182-12/+27
| | | | | | | | | | | | If the core doesn't provide an optimized version of this method, provide one without core-specific optimizations. Use this to make Cortex-A8 support the "arm reg" command. Related: make the two register access methods properly static, have the "set" log a "not halted" error too, and make sure that the "valid" flag is set on successful reads. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: simplify ARMv7-A register handlingDavid Brownell2009-11-183-188/+50
| | | | | | | | | | | | | | | | | | | ARMv7-A doesn't need to duplicate all the standard ARM code for register handling. - Switch Cortex-A8 to use the standard register code - Remove duplicated infrastructure from ARMv7-A - Have ARMv7-A arch_state() show CPSR, like other ARMs Add comments to show where the Cortex-A8 isn't actually doing the right thing for register reads/writes, unless core happens to be in the right mode to start with. (Looks like maybe there may be generic confusion between saved/current PSR values in all the ARM code ...) Make related ARMv7-A and Cortex-A8 symbols properly static. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: setup "secure monitor mode" shadow regsDavid Brownell2009-11-182-21/+53
| | | | | | | | | | | | | Teach the "armv4_5" register code to understand about the secure monitor mode: - Add the other three shadowed registers to the arrays - Support another internal mode number (sigh) in mappings - Catch malloc/calloc failures building that register cache This should kick in for Cortex-A8 and ARM1176. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: add "core_type" field to "struct arm"David Brownell2009-11-184-5/+31
| | | | | | | | | | It's used to flag cores with the "TrustZone" extension, and is used in subsequent patches to set up support for the registers shadowed by its new secure monitor mode. The ARM1176 and Cortex-A8 both support this new mode. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* split startup.tcl file across modulesZachary T Welch2009-11-182-1/+168
| | | | | | | Moves definitions for each layer into their own file, eliminating layering violations in the built-in TCL code. Updates src/Makefile.am rules to include all files in the final startup.tcl input file, and others Makefile.am rules to distribute the new files in our packages.
* fix regression in md/mw commandsZachary T Welch2009-11-181-4/+2
| | | | | | | The recent migration broke them, the fixes broken them in a new way, but this should restore them to working order. Eliminates the temporary variable, as the CMD_NAME macro can once again be use in routines that increment CMD_ARGV without nasty side-effects.
* jtag-api: get rid of unecessary buf_set_u23() that make code obtuse.Øyvind Harboe2009-11-181-11/+10
| | | | | | | | Also, this is on the path to increasing the word size for bit vectors from 8 to something wider(32? natural host machine width?) Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* ARM: add is_arm_mode()David Brownell2009-11-176-40/+39
| | | | | | | | | | | | | | | | | | Add a new is_arm_mode() predicate, and use it to replace almost all calls to current armv4_5_mode_to_number(). Eventually those internal mode numbers should vanish... along with their siblings in the armv7a.c file. Remove a handful of superfluous checks ... e.g. the mode number was just initialized, or (debug entry methods) already validated. Move one of the macros using internal mode numbers into the only file which uses that macro. Make the tables manipulated with those numbers be read-only and, where possible, static so they're not confused with part of the generic ARM interface. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: add arm_mode_name()David Brownell2009-11-179-30/+75
| | | | | | | | | | | | | | | Add and use arm_mode_name() to map from PSR bits to user meaningful names. It uses a new table which, later, can be used to hold other mode-coupled data. Add definitions for the "Secure Monitor" mode, as seen on some ARM11 cores (like ARM1176) and on Cortex-A8. The previous mode name scheme didn't understand that mode. Remove the old mechanism ... there were two copies, caused by Cortex-A8 needing to add "Secure Monitor" mode support. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: only use one set of dummy FPA registersDavid Brownell2009-11-178-106/+39
| | | | | | | | | | | | | | | | All ARM cores need to provide obsolete FPA registers in their GDB register dumps. (Even though cores with floating point support now generally use some version of VFP...) Clean up that support a bit by sharing the same dummy registers, and removing the duplicate copies. Eventually we shouldn't need to export those dummies. (This makes the ARMv7-M support include the armv4_5 header, and cleans up related #includes, but doesn't yet use anything from there except those dummies.) Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* command_handler: change 'cmd_ctx' to CMD_CTXZachary T Welch2009-11-1720-364/+367
| | | | Convert all command handler 'cmd_ctx' parameter usage with CMD_CTX.
* command_handler: change 'args' to CMD_ARGVZachary T Welch2009-11-1720-189/+189
| | | | | This patch converts all instances of 'args' in COMMAND_HANDLER routines to use CMD_ARGV macro.
* command_handler: change to 'argc' to CMD_ARGCZachary T Welch2009-11-1719-120/+120
| | | | | This patch converts all instances of 'argc' in COMMAND_HANDLER routines to use CMD_ARGC.
* target: simplify register get/set opsDavid Brownell2009-11-1713-127/+60
| | | | | | | | | | | No need to indirect from registered integers to pointers. Just stash the pointers directly in the register struct, and don't even bother registering. This is a small code shrink, speeds register access just a smidgeon, and gets rid of another rude exit() path. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM9TDMI: remove now-needless "struct arm9tdmi"David Brownell2009-11-179-72/+45
| | | | | | | And move the rest of the vector_catch stuff into the C file; it's not part of the module interface. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM7TDMI: remove now-needless "struct arm7tdmi"David Brownell2009-11-174-29/+21
| | | | Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* target: remove some more duplicate includesDavid Brownell2009-11-174-4/+1
| | | | Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARMv7-A: no exit() callsDavid Brownell2009-11-162-4/+3
| | | | | | | Also, switch integrity check over to the correct magic number, and remove duplicate v4/v5 #define. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* Cortex-A8: no exit() calls, add missing v7-A initDavid Brownell2009-11-161-31/+16
| | | | | | | Eventually there should be a v7a init routine, but for now all that is inlined here. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* XScale: fewere exit() callsDavid Brownell2009-11-161-4/+4
| | | | Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* MIPS: no exit() callsDavid Brownell2009-11-162-7/+5
| | | | Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARMv7-M: no exit() callsDavid Brownell2009-11-161-4/+4
| | | | Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARMv4/ARMv5: no exit() callsDavid Brownell2009-11-161-6/+8
| | | | Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM11: fewer exit() callsDavid Brownell2009-11-161-4/+6
| | | | Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* Cortex-M3: don't exit()David Brownell2009-11-161-24/+10
| | | | | | | Get rid of undesirable and needless exit() calls from the Cortex-M3 support. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARMv7A: use standard disassemblerDavid Brownell2009-11-161-83/+0
| | | | | | We no longer need v7A-specific code for this. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM11: register (most) standard ARM commandsDavid Brownell2009-11-162-1/+10
| | | | | | | Have ARM11 register the "standard" ARM commands. For now, only disassembly really works. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: "armv4_5" command prefix becomes "arm"David Brownell2009-11-161-9/+9
| | | | | | | | | | Rename the "armv4_5" command prefix to straight "arm" so it makes more sense for newer cores. Add a simple compatibility script. Make sure all the commands give the same "not an ARM" diagnostic message (and fail properly) when called against non-ARM targets. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* fileio: improve API typesZachary T Welch2009-11-165-15/+15
| | | | | | | | | | | | | Use size_t instead of uint32_t when specifying file sizes. Update all consumers up through the layers to use size_t when required. These changes should be safe, but the higher-levels will need to be updated further to receive the intended benefits (i.e. large file support). Add error checking for fileio_read and file_write. Previously, all errors were being silently ignored, so this change might cause some problems for some people in some cases. However, it gives us the chance to handle any errors that do occur at higher-levels, rather than burying our heads in the sand.
* struct fileio: improve member typesZachary T Welch2009-11-161-1/+1
| | | | | | Add const keyword to file url and cast to free(). Make size an ssize_t and chase all format strings that use it.
* ARM: standard disassembler uses Thumb2 entryDavid Brownell2009-11-162-38/+38
| | | | | | | | | | | | | | | | | Tweak "standard" ARM disassembler diagnostics to fail if the target is not "an ARM" (vs. not "an ARMV4/5"), so it makes more sense for cores inheriting this as the "generic" disassembler. Also, to use the Thumb2 entry instead of the original Thumb entry. This makes it work better for both newer cores (which support those added instructions) and for BL and BLX instructions on older cores. (Those instructions are 32-bits, which requires curious state-aware code to go through a 16-bit decode interface...) Plus minor cleanups, notably to have fewer exit paths and to make sure they all return failure codes. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* target: don't include "log.h" from "armv4_5.h"David Brownell2009-11-162-1/+1
| | | | | | | No point in multiple includes, and that file doesn't use its functions any more. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: move mode functions out of headerDavid Brownell2009-11-162-40/+56
| | | | | | | | | They're really too big to inline, at least for code that's not in any performance-critical loops. Also move the associated string table to the rodata section. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* target: less implicit inclusion of "etm.h"David Brownell2009-11-169-2/+13
| | | | | | | Don't include it in more headers than necessary; just use it in the few files that actually need it. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* move ARRAY_SIZE macro to types.hZachary T Welch2009-11-168-44/+32
| | | | | | | | The ARRAY_SIZE macro was defined in several target files, so move it to types.h. This patch also removes two other identical macros: DIM (from jtag.h) and asizeof (from arm11.h).
* armv7m: make core reg read/write use unsignedZachary T Welch2009-11-162-6/+6
| | | | | | Eliminate redundant check that gets covered by using unsigned type. Created to eliminate noise from subsequent patches, but this kind of conversion will be beneficial in similar ways throughout the tree.
* rename CEIL as DIV_ROUND_UPZachary T Welch2009-11-164-8/+8
| | | | | Improves the name of this macro, moves it to types.h, and adds a block of Doxygen comments to describe what it does.
* move container_of to types.hZachary T Welch2009-11-161-13/+0
| | | | | | The container_of macro is useful as a general solution. It belongs in types.h, rather than target.h where it was introduced. Requires the offsetof macro, which comes from <stddef.h> (moved as well).
* #include "target.h" less wildlyDavid Brownell2009-11-169-6/+7
| | | | | | | | | Don't include "target.h" from more headers than necessary. This avoids needless interdependencies and duplicated include paths. Don't needlessly include it in source files, either. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* target: no implicit #includes of "register.h"David Brownell2009-11-1627-10/+21
| | | | | | | | | | | | Same deal: "register.h" got needlessly included all over the place because of being in a few widely included headers. So take it out of the header files which included it, and put it in files which use it ... reduce needless interdependencies. Also, don't need that extra "types.h" inclusion. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* target: less implicit inclusion of "command.h"David Brownell2009-11-165-7/+3
| | | | | | | | | | Lots of files still include it, often through needless duplicate inclusion of "log.h"; sigh. This cleans up the inclusion graph a bunch, so there are fewer inclusion paths, but it doesn't change much otherwise. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* target: don't implicitly include "algorithm.h"David Brownell2009-11-166-3/+6
| | | | | | | | | | | | | | Most files in the tree seem to have ended up including this, and *quite* needlessly ... only code implementing or using downloadable algorithms actually needs these declarations. So take it out of the header files which included it, and put it in files which use it ... reduce needless interdependencies. Also: "algorithm.h" doesn't need to include "types.h" again; it already comes from a different header. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* target: don't implicitly include "breakpoint.h"David Brownell2009-11-1611-2/+11
| | | | | | | | | | | Most files in the tree seem to have ended up including this, and *quite* needlessly ... only code implementing or using breakpoints actually needs these declarations. So take it out of the header files which included it, and put it in files which use it ... reduce needless interdependencies. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM11: use now-generic memory utilsDavid Brownell2009-11-151-11/+2
| | | | | | | | | | | | Now the ARM11 cores can use the renamed arm_checksum_memory() and arm_blank_check_memory() routines ... do so. Sanity checked with "flash erase_check" of both NOR banks on an OMAP2420 ... the algorithm code dumped four lines of of "poll" status after each of almost 520 blocks (yes, *very* annoying) but gave plausible results after producing that spam. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM11: fixup method tableDavid Brownell2009-11-152-47/+43
| | | | | | | | | Three changes: remove ARM11_HANDLER() in favor of normal structure initialization syntax; fix goofy indentation in that structure; and don't needlessly export arm11_register_commands(), it's only called through that method table. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: memory utils aren't ARM7/ARM9 dependentDavid Brownell2009-11-1515-178/+209
| | | | | | | | | | | | | | | | The arm7_9_checksum_memory() and arm7_9_blank_check_memory() routines are not actually specific to the ARM7 and ARM9 core generations ... they can work for any core which can run algorithms using basic ARM (not Thumb) instructions. Rename them; move the declarations to a more generic site; likewise move the code (and tidy it a bit in the process). NOTE: the blank_check() method falsely returned a success status (0) on one error path, when the algorithm failed. Fixed this bug. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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