summaryrefslogtreecommitdiff
path: root/src/target
Commit message (Collapse)AuthorAgeFilesLines
* Add opcodes for load/store registers words immediate post-indexedLuca Ellero2011-04-131-0/+12
| | | | Signed-off-by: Luca Ellero <lroluk@gmail.com>
* cortex_a :apb mem read/write working with mmu_onMichel JAOUEN2011-04-131-159/+171
| | | | | | Conflicts: src/target/cortex_a.c
* cortex_a : multiple target on the same dapMichel JAOUEN2011-04-131-0/+10
|
* cortex_a : use dap ref from armv4_5commonMichel JAOUEN2011-04-131-18/+18
|
* cortex_a : implement jtag console for cortex_aMichel JAOUEN2011-04-061-46/+13
|
* Added mips_ejtag_drscan_32_out() for optimization.Drasko DRASKOVIC2011-04-054-6/+22
|
* Corrected waiting on PrAcc in wait_for_pracc_rw(). Added necessary check ↵Drasko DRASKOVIC2011-04-051-14/+42
| | | | that PrAcc is "1" before FASTDATA access.
* Added correct endianess treatment for big endian targets. Now it is possible ↵Drasko DRASKOVIC2011-04-051-6/+72
| | | | to use mips_m4k_write_memory() and mips_m4k_read_memory() to correctly set-up SDRAM, as well as bulk data write, which already handled endianess well. Also added correct endianess manipulation in case of fallback from erroneus bulk write to simple write (to avoid byte swapping two times).
* cortex_a: delete dbgbase hack vestigesØyvind Harboe2011-04-011-15/+0
| | | | Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* cortex_a: fix gaffe in first implementation of -dbgbaseMichel JAOUEN2011-04-011-9/+9
|
* Merge remote branch 'origin/master' into HEADØyvind Harboe2011-04-0130-159/+152
|\
| * cortex_a: remove broken dbgbase patchup codeØyvind Harboe2011-04-011-25/+0
| | | | | | | | | | | | | | | | | | | | the patchup code would get false positives when checking whether a dbgbase had to be corrected. The solution is to have autodetect default, with manual override in scripts. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
| * mips: illustrates how to improve performanceØyvind Harboe2011-04-013-8/+18
| | | | | | | | | | | | | | Do not require unecessary roundtrips for clocking out data. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
| * types: write memory now uses constØyvind Harboe2011-04-0127-80/+80
| | | | | | | | Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
| * mips: delete kludgy code that modifies data sent to write_memory()Øyvind Harboe2011-03-311-1/+16
| | | | | | | | | | | | | | | | Could this cause confusion as data sent to write would be flipped and then if the caller subsequently used the data, e.g. a compare mismatch might happen? Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
| * mips: mips32_pracc_exec error propagation fixesØyvind Harboe2011-03-312-29/+21
| | | | | | | | Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
| * mips: mips_ejtag_get_impcode error propagation addedØyvind Harboe2011-03-312-2/+7
| | | | | | | | Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
| * mips: fix mips_ejtag_set_instr error handlingØyvind Harboe2011-03-312-14/+10
| | | | | | | | | | | | this fn does not fail, it queues data. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* | mips: fix gaffe in previous commitØyvind Harboe2011-04-011-1/+4
|/ | | | | | | | accidentally invoked return jtag_execute_queue() in the middle of a fn. Hmm.... I would have expected gcc or at least lint to catch this. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* mips: fix error handling for jtag_execute_queue()Øyvind Harboe2011-03-312-8/+8
| | | | Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* xscale: fix gaffe in phys writeØyvind Harboe2011-03-311-1/+1
| | | | | | | it would *read* instead of *write* to memory when the MMU was disabled. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* cortex-a: use -dbgbase optionØyvind Harboe2011-03-311-5/+12
| | | | Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* target: add -dbgbase option to target configurationØyvind Harboe2011-03-312-0/+23
| | | | | | | | | Really a Cortex-A specific option, but there is no system in place to support target specific options currently and there has been no need for such a system until now. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* bugfix for step <address> mips_m4kAndrew Lyon2011-03-291-0/+4
| | | | | | | | | The patch below fixes step <address> on mips_m4k. Spencer Oliver <spen@spen-soft.co.uk>: The current code is used on all other arch's - is there a underlying issue with those aswell ?
* cortex_a: rename cortex_a8.c/h to cortex_a.c/hØyvind Harboe2011-03-223-3/+3
| | | | Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* omap4430: tried to add in workaround for broken dbgbase queryØyvind Harboe2011-03-221-0/+1
| | | | Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* cortex a9: merge cortex a9 and a8 codeØyvind Harboe2011-03-226-2512/+289
| | | | | | better to keep this in a single file. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* dsp563xx_once: fix warning and potential bugØyvind Harboe2011-03-201-1/+1
| | | | | | | | I don't think dsp563xx_once_read_register() would ever be called with len==0, but it would have been broken in that case. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* target: allow targets to override memory alignmentMathias K2011-03-172-4/+32
| | | | | Targets can implement read/write_buffer to handle alignment.
* SYS_WRITE0 fixJohn and Tina Peterson2011-03-171-1/+1
| | | | | | Problem is, trying to print "Hello, world!\n" just prints endless H's, because r1 is never incremented. One way to fix it would be to add a "++" after "r1".
* Fix a bunch of typos.Uwe Hermann2011-03-175-6/+6
| | | | | | | | Fix a bunch of typos. Most are in code comments, so nothing should break. UNKOWN_COMMAND and CMD_UNKOWN are not used elsewhere, so correcting the spelling should also not break anything.
* dsp563xx: fix alignment warningsØyvind Harboe2011-03-151-6/+6
| | | | Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* dsp563xx: fix bug in x buffer handlingØyvind Harboe2011-03-151-1/+1
| | | | | | found by inspection. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* cortex_a8: remove dap_ap_sel callsLuca Ellero2011-02-231-68/+60
| | | | | | | add new mem_ap_sel_* functions (as was made for cortex_a9) see commit: 779005f43dc372de937dfd4b445f31d882b98eca Signed-off-by: Luca Ellero <lroluk@gmail.com>
* dsp563xx: rudimentary gdb supportMathias K2011-02-211-206/+477
| | | | | | | | | | | This patch add rudimentary gdb support. The gdb register list order is corrected. All registers are now 32bit width. Events are send to signalize gdb the current target status. Resume and step function was corrected to consider a modified pc register. Read/write memory now support L memory type, this means a memory with alternating y/x memory words. The memspace variable, used by gdb, is now observed before a default memory access is initiated. Dummy functions for breakpoint and watchpoint are added.
* arm_adi_v5: add/move apsel member in struct adiv5_dapLuca Ellero2011-02-174-75/+72
| | | | | | | | | | | | | | | This patch tries to make some order in "apsel" mess. "dap apsel" command was quite useless (and broken) by itself. With this patch we can use it to select between AHB or APB memory access (previous patch 05ab8bdb813acdcd74afa71d6656c2df816cb230 was somehow broken). - moves member apsel (in struct adiv5_dap) to ap_current - adds apsel member this strange choice is made trying to keep coherence in "dap apsel" command and to keep compatibility with other code (for example cortex_a8). Signed-off-by: Luca Ellero <lroluk@gmail.com>
* dsp563xx: minor fixes, code cleanupMathias K2011-02-171-52/+110
| | | | | | | | This patch move the dsp563xx_target_create function to the related code block. Also the target examine function was added and the register cache is initialized in a separate function. The missing functionality to invalidate the x memory context on memory writes was also added.
* dsp563xx_once: Correct wrong return value on jtag communication errorsMathias K2011-02-171-7/+7
| | | | | | | | This patch change the return value on a jtag communication error to TARGET_UNKNOWN because this function should return the current target status and not a error code from the underlying api call. Also the validity of the jtag_status is extended to all static bits in this value.
* - remove pipeline context, use once register instead - fix wrong register ↵Mathias K2011-02-172-71/+82
| | | | write in resume and step function - add more conditional branch handling
* - add parameter flush to the once api to signalize if the jtag queue need to ↵Mathias K2011-02-153-167/+90
| | | | be flushed after the command
* - add bulk memory write function - execute jtag queue at the end of the ↵Mathias K2011-02-151-11/+47
| | | | memory transfer
* dsp563xx_once: Correct definition of JTAG_INSTR_CLAMPPhil Fong2011-02-151-1/+1
| | | | | | | | | | | I've been working on Rodrigo on adding support to flash Freescale dsp56800e devices and have been looking at the dsp563xx code. I think the define for the JTAG CLAMP instruction in dsp563xx_once.c is incorrect. It should be 0x05 according the Freescale AN2074 (and is also 0x05 in the dsp568xx according to AN1935). It won't actually change anything in OpenOCD since this define is not used anywhere (as far as I can tell).
* cortex_a9: move dap_ap_select to arm_avi_v5Luca Ellero2011-02-141-92/+66
| | | | | | | | | | | | | | | dap_ap_select was used in the code at various points, but that can lead to confusion, without any knowledge of what AP is really selected at some points. Some bugs derive from this (for example md/mw doesn't work well after issueing "dap apsel" command). Moving it to arm_adi_v5.c (using mem_ap_sel* functions instead of mem_ap_*) make the code more clear and more easier to maintain. In the future it should be made "static" to avoid its use outside arm_adi_v5 One further benefit is the various goto has been removed as well Signed-off-by: Luca Ellero <lroluk@gmail.com>
* arm_adi_v5: add wrapping transfer functions with selection of apLuca Ellero2011-02-142-1/+75
| | | | Signed-off-by: Luca Ellero <lroluk@gmail.com>
* arm_adi_v5: add transfer functions prototypes with selection of apLuca Ellero2011-02-141-0/+31
| | | | Signed-off-by: Luca Ellero <lroluk@gmail.com>
* cortex_a9: check if MMU is enabled on APB read/write memoryLuca Ellero2011-02-141-0/+22
| | | | Signed-off-by: Luca Ellero <lroluk@gmail.com>
* cortex_a9: check target halted on APB read/write memoryLuca Ellero2011-02-141-0/+12
| | | | Signed-off-by: Luca Ellero <lroluk@gmail.com>
* cortex_a9: trivial fixesLuca Ellero2011-02-141-6/+7
| | | | Signed-off-by: Luca Ellero <lroluk@gmail.com>
* buikd: fix cygwin -mno-cygwin build errorSpencer Oliver2011-02-101-1/+1
| | | | | | Remove duplicate inline that causes certain versions of gcc to choke. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* cortex_a9: implement read/write memory through APB-APLuca Ellero2011-02-101-31/+129
| | | | | | | | | | | | | | | This patch adds read/write capability to memory addresses not accessible through AHB-AP (for example "boot ROM code"). To select AHB or APB, a "dap apsel" command must be issued: dap apsel 0 -> following memory accesses are through AHB dap apsel 1 -> following memory accesses are through APB NOTE: at the moment APB memory accesses are very slow, compared to AHB accesses. Work has to be done to get it faster (for example LDR/STR instead od LDRB/STRB) Signed-off-by: Luca Ellero <lroluk@gmail.com>
generated by cgit v1.2.3 (git 2.46.0) at 2024-11-09 07:55:36 +0000