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* SWD: swd tcl commands are now available from CLI and initialized at program ↵Tomek CEDRO2011-10-131-1/+0
| | | | startup with other commands.
* target/arm_adi_v5.c: experimental change in mem_ap_read_buf_u32() to work ↵Tomek CEDRO2011-09-111-15/+78
| | | | with SWD and become JTAG independent. This may break ARM target support for JTAG. Original function was renamed to mem_ap_read_buf_u32_old().
* TARGET/ARMADIV5: DAP operations are set to SWD if transport name is swd.Tomek CEDRO2011-07-281-3/+1
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* TRANSPORT/TARGET: Updated source tree to build and use new swd ↵Tomek CEDRO2011-06-253-3/+5
| | | | infrastructure from src/transport not jtag/swd.h nor target/adi_v5_swd.c.
* ARM_ADI_V5: DAP initialization will select and initialize transport and its ↵Tomek CEDRO2011-06-221-5/+33
| | | | function set (functions to talk with DAP using JTAG or SWD). Minor description updates.
* ARM_ADI_V5: Extended adiv5_dap with void *ctx pointer to store ↵Tomek CEDRO2011-06-221-2/+18
| | | | transport/operation specific data (this will hold swd_ctx).
* transport: move files over to transport folderØyvind Harboe2011-06-131-1/+1
| | | | | | as we introduce swd and jtag as two transports, we want to start up with a new transport folder to organize the code a bit.
* doxy moreRodrigo L. Rosa2011-06-121-2/+3
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* doxy & cleanupRodrigo L. Rosa2011-06-122-316/+531
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* cleanup trailing whitespacesRodrigo L. Rosa2011-06-122-8/+8
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* flash speed improvedRodrigo L. Rosa2011-06-121-0/+8
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* removed unnecessary actions/controlsRodrigo L. Rosa2011-06-121-38/+8
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* cleanup flash module commandRodrigo L. Rosa2011-06-121-8/+12
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* fix read for verify_imageRodrigo L. Rosa2011-06-121-26/+4
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* fix read speed improved by queueing commandsRodrigo L. Rosa2011-06-121-0/+13
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* fix flash driver size, sector eraseRodrigo L. Rosa2011-06-122-135/+58
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* Fix "unused variable" warnings (errors) detected with GCC 4.7.0 - leftover ↵Freddie Chopin2011-06-072-19/+0
| | | | changes
* mips: add nor flash write from memory blockStefan Mahr2011-06-051-1/+5
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* crc check on flashed dataRodrigo L. Rosa2011-06-041-10/+71
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* code cleanupRodrigo L. Rosa2011-06-041-21/+11
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* Fix "unused variable" warnings (errors) detected with GCC 4.7.0 - dubious fixesFreddie Chopin2011-06-041-4/+0
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* Fix "unused variable" warnings (errors) detected with GCC 4.7.0 - trivial fixesFreddie Chopin2011-06-0413-60/+10
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* mips: fixup fastdataStefan Mahr2011-06-012-6/+10
| | | | fixup fastdata
* mips: fix some more endian madnessStefan Mahr2011-06-012-63/+59
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* mips: fix swapping if running on big endian hostStefan Mahr2011-05-291-3/+19
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* mips: fix swapping if openocd is running on big endian hostStefan Mahr2011-05-281-1/+4
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* dsp5680xx: whitespace cleanupSpencer Oliver2011-05-231-43/+43
| | | | Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* Fix build issue under cygwinSpencer Oliver2011-05-231-1/+1
| | | | | | | cygwin does not define sleep, so use our internal win32 version. caused by commit 9d4aec6bda90ad39a140747ea270c6a09dd26440 Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* flashing speed improved using queued jtag. error propagation improved.Rodrigo L. Rosa2011-05-192-287/+351
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* partial support for 568013 and 568037, target integration.Rodrigo L. Rosa2011-05-184-1/+1572
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* Remove useless MIPS code in avr32_ap7k.c.Jie Zhang2011-05-031-4/+0
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* cortex_a : smp supportMichel Jaouen2011-04-281-15/+230
| | | | | | Conflicts: src/target/cortex_a.c
* smp : infra for smp minimum supportMichel Jaouen2011-04-286-15/+335
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* RTOS Thread awareness support wipBroadcom Corporation (Evan Hunter)2011-04-152-0/+27
| | | | | | | | | | | - works on Cortex-M3 with ThreadX and FreeRTOS Compared to original patch a few nits were fixed: - remove stricmp usage - unsigned compare fix - printf formatting fixes - fixed a bug with overrunning a memory buffer allocated with malloc.
* Replace byte-access to memory with faster word-accessLuca Ellero2011-04-131-21/+69
| | | | | | | | | Freescale iMX53 doesn't seem to like unaligned accesses to his memory mapped registers. Anyway this patch makes dump_image/load_image 4X faster for every access through APB. Signed-off-by: Luca Ellero <lroluk@gmail.com>
* Add opcodes for load/store registers words immediate post-indexedLuca Ellero2011-04-131-0/+12
| | | | Signed-off-by: Luca Ellero <lroluk@gmail.com>
* cortex_a :apb mem read/write working with mmu_onMichel JAOUEN2011-04-131-159/+171
| | | | | | Conflicts: src/target/cortex_a.c
* cortex_a : multiple target on the same dapMichel JAOUEN2011-04-131-0/+10
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* cortex_a : use dap ref from armv4_5commonMichel JAOUEN2011-04-131-18/+18
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* cortex_a : implement jtag console for cortex_aMichel JAOUEN2011-04-061-46/+13
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* Added mips_ejtag_drscan_32_out() for optimization.Drasko DRASKOVIC2011-04-054-6/+22
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* Corrected waiting on PrAcc in wait_for_pracc_rw(). Added necessary check ↵Drasko DRASKOVIC2011-04-051-14/+42
| | | | that PrAcc is "1" before FASTDATA access.
* Added correct endianess treatment for big endian targets. Now it is possible ↵Drasko DRASKOVIC2011-04-051-6/+72
| | | | to use mips_m4k_write_memory() and mips_m4k_read_memory() to correctly set-up SDRAM, as well as bulk data write, which already handled endianess well. Also added correct endianess manipulation in case of fallback from erroneus bulk write to simple write (to avoid byte swapping two times).
* cortex_a: delete dbgbase hack vestigesØyvind Harboe2011-04-011-15/+0
| | | | Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* cortex_a: fix gaffe in first implementation of -dbgbaseMichel JAOUEN2011-04-011-9/+9
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* Merge remote branch 'origin/master' into HEADØyvind Harboe2011-04-0130-159/+152
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| * cortex_a: remove broken dbgbase patchup codeØyvind Harboe2011-04-011-25/+0
| | | | | | | | | | | | | | | | | | | | the patchup code would get false positives when checking whether a dbgbase had to be corrected. The solution is to have autodetect default, with manual override in scripts. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
| * mips: illustrates how to improve performanceØyvind Harboe2011-04-013-8/+18
| | | | | | | | | | | | | | Do not require unecessary roundtrips for clocking out data. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
| * types: write memory now uses constØyvind Harboe2011-04-0127-80/+80
| | | | | | | | Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
| * mips: delete kludgy code that modifies data sent to write_memory()Øyvind Harboe2011-03-311-1/+16
| | | | | | | | | | | | | | | | Could this cause confusion as data sent to write would be flipped and then if the caller subsequently used the data, e.g. a compare mismatch might happen? Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
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