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* ARM7/ARM9: help/usage updatesDavid Brownell2010-01-071-8/+8
| | | | | | | | | | | | | | | | | | Provide helptext which was sometimes missing; update some of it to be more accurate. Usage syntax messages have the same EBNF as the User's Guide; there should be no angle brackets in either place. Fix the User's Guide in a few places to be more consistent (mostly to use brackets not parentheses) and to recognize that parameter may be entirely optional (in which case the command just displays output, and changes nothing). Also reference NXP, not Philips, for LPC chips. Don't use "&function"; functions are like arrays, their address is their name. Shrink some overlong lines. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARMv7: help/usage updatesDavid Brownell2010-01-075-34/+60
| | | | | | | | | | | | | | | | | | Provide helptext which was sometimes missing; update some of it to be more accurate. Usage syntax messages have the same EBNF as the User's Guide; there should be no angle brackets in either place. Don't use "&function"; functions are like arrays, their address is their name. Shrink some overlong lines, remove some empties. Add a couple comments about things that should change: those extra TCK cycles for MEM-AP reads are in the wrong place (that might explain some problems we've seen); the DAP command tables should be shared, not copied. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM ETM/ETB/trace: help/usage updatesDavid Brownell2010-01-074-29/+47
| | | | | | | | | | | | | Provide helptext which was sometimes missing; update some of it to be more accurate. Usage syntax messages have the same EBNF as the User's Guide; no angle brackets in either place. Don't use "&function"; functions are like arrays, their address is their name. Shrink some overlong lines, remove some empties. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* target misc: help/usage updatesDavid Brownell2010-01-073-131/+164
| | | | | | | | | | | | Provide helptext which was sometimes missing; update some of it to be more accurate. Usage syntax messages have the same EBNF as the User's Guide. Don't use "&function"; functions are like arrays, their address is their name. Shrink some overlong lines; remove some empties. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* XScale: help/usage updatesDavid Brownell2010-01-071-36/+43
| | | | | | | | | | | | | | Provide helptext which was sometimes missing; update some of it to be more accurate (mostly they display something w/no args). Usage syntax messages have the same EBNF as the User's Guide. In some cases, *exactly* what the user's guide shows... e.g. talking about "offset" not "address" for trace_image. Don't use "&function"; functions are like arrays, their name is their address. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* MIPS: change bulk_write_memory fallback msg to LOG_DEBUGSpencer Oliver2010-01-071-1/+1
| | | | Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* MIPS: whitespace cleanupSpencer Oliver2010-01-075-219/+218
| | | | Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* MIPS: fastdata bulk write fallbackSpencer Oliver2010-01-062-9/+7
| | | | | | | If fastdata access fails, then fallback to default mips_m4k_write_memory Remove unnecessary fastdata loader verify check Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* ARM: add #defines for JTAG ack codesDavid Brownell2010-01-052-6/+9
| | | | | | | | JTAG has only two possible JTAG ack codes for APACC and DPACC register reads/writes. Define them, and remove empty "else" clause in the code which now uses those codes. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: add comments re DAP assumptionsDavid Brownell2010-01-051-2/+14
| | | | | | | I think some of these assumptions are not well-founded. Related, that swjdp_transaction_endcheck() is a bit iffy. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* MIPS: pracc access tweaksSpencer Oliver2010-01-051-15/+8
| | | | | | reorder the pracc access so we can save a few access cycles Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* MIPS: optimize pracc accessSpencer Oliver2010-01-054-88/+51
| | | | | | | remove unnecessary nops when accessing ejtag pracc general fastdata patch cleanup Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* MIPS: merge mips fast_data patch from David N. ClaffeyDavid Claffey2010-01-057-7/+244
| | | | Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* ARMv7-M: use AP_REG_* symbolDavid Brownell2010-01-041-1/+6
| | | | Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: ADIv5 JTAG symbol cleanupDavid Brownell2010-01-022-35/+68
| | | | | | | | | | | | | | Rename DAP_IR_* as JTAG_DP_* since those symbols are specifically for JTAG-DP (or SWJ-DP in JTAG mode), and won't work with SWD. Define the JTAG ABORT and IDCODE instructions for completeness; add a comment about where to (someday) use ABORT. Fix messaging which assumes everything is an SWJ-DP; say "JTAG-DP" instead, it's at least more appropriate for all JTAG transports. Shrink the affected lines. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: dap info fix + tweaksDavid Brownell2010-01-021-8/+14
| | | | | | | | Fix: don't print the BASE address except if it's a MEM-AP; that's an unlikely error, but there's no point getting it wrong. Tweaks: comments, capitalization. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: ADIv5 export cleanupDavid Brownell2010-01-022-31/+35
| | | | | | | | | Make some private functions "static". Remove their public declarations, and what is now an obviously unused function. Shrinks this object's size (about 5% on x86_64) while making the code's scope easier to understand. Shrink the affected lines. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: ADIv5 symbol and comment cleanupDavid Brownell2010-01-022-29/+94
| | | | | | | | | | | Instead of magic numbers, use their AP_REG_* constants. Rename the ROM address symbol as BASE to match ARM's documentation. Comment various other symbols in the header; add some missing ones. Remove an unused struct. Add some doxygen for stuff including the DAP structure and initialization. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* Cortex-M3: minor breakpoint cleanupDavid Brownell2010-01-021-12/+25
| | | | | | | Shrink some lines, add some comments, simplify some tests. During debug startup, log the core revision level too. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* streamline and document helptext mode displaysDavid Brownell2010-01-024-4/+4
| | | | | | | | | | | | | | | | | | | Most commands are usable only at runtime; so don't bother saying that, it's noise. Moreover, tokens like EXEC are cryptic. Be more clear: highlight only the commands which may (also) be used during the config stage, thus matching the docs more closely. There are - Configuration commands (per documentation) - And also some commands that valid at *any* time. Update the docs to note that "help" now shows this mode info. This also highlighted a few mistakes in command configuration, mostly commands listed as "valid at any time" which shouldn't have been. This just fixes ones I noted when sanity testing. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM7_9: Fix segfaultsAntonio Borneo2009-12-302-0/+11
| | | | | | | | | | | Handlers for commands - arm7_9 semihosting <enable | disable> - $_TARGETNAME arp_reset assert 1 didn't check if target has already been examined, and could segfault when using the NULL pointer "arm7_9->eice_cache". Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM9TDMI: Fix segfault.Antonio Borneo2009-12-301-0/+6
| | | | | | | | | The handler for "arm9tdmi vector_catch ..." did not check if target has already been examined. Without this fix it segfaults when using NULL pointer "arm7_9->eice_cache". Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* MinGW build fixesFreddie Chopin2009-12-281-1/+1
| | | | | | | | Print "ssize_t" as "%ld" (+ cast to long) not as "%zu". Official MinGW (gcc 3.4.5) doesn't understand "z" flag. Signed-off-by: Freddie Chopin <freddie_chopin@op.pl> Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: add comment re register exportsDavid Brownell2009-12-262-0/+2
| | | | Modern versions of GDB can understand VFP3 and iwMMXt hardware.
* Packaging fixDavid Brownell2009-12-211-0/+1
| | | | | | Don't forget to list target/arm_opcodes.h Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* Cortex-M3: cleanupDavid Brownell2009-12-201-45/+111
| | | | | | | | | | | | Misc: - Introduce some "struct reg" temporaries, for clarity - Shorten lines - Add some missing whitespace - Clean up comments - Add notes about some fault handling issues - Most of these errata workarounds are for *OLD* chip revisions Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM11: recognize ARM11 MPCoreDavid Brownell2009-12-201-5/+11
| | | | | | | And add my copyright. MPCore is untested, but it's the only other ARM11 core to care about. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* arm7_9: Support VINITHI signalAntonio Borneo2009-12-201-23/+0
| | | | | | | | | | | Command "reset halt" checks if PC properly resets, issueing warning: "PC was not 0. Does this target need srst_pulls_trst?". Checking PC against 0 is not always correct. Removed PC value check, as suggested by Øyvind Harboe. Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Signed-off-by: U-PROPRIET-28D9DF\PROPRIETAIRE <PROPRIETAIRE@propriet-28d9df.(none)>
* oocd_trace buildfixesDavid Brownell2009-12-191-4/+4
| | | | Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ETM: add "etm trigger_debug" commandDavid Brownell2009-12-191-4/+62
| | | | | | | | | | | | | | | | In conjunction with manual register setup, this lets the ETM trigger cause entry to debug state. It should make it easier to test and bugfix the ETM code, by enabling non-trace usage and isolating bugs specific to thef ETM support. (One current issue being that trace data collection using the ETB doesn't yet behave.) For example, many ARM9 cores with an ETM should be able to implement four more (simple) breakpoints and two more (simple) watchpoints than the EmbeddedICE supports. Or, they should be able to support complex breakpoints, incorporating ETM sequencer, counters, and/or subroutine entry/exit criteria int criteria used to trigger debug entry. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ETM: more ETM_CTRL bit cleanupDavid Brownell2009-12-192-56/+49
| | | | | | | | | | | | | | | | | | | Change handling of the CYCLE_ACCURATE, BRANCH_OUTPUT, and TRACE_* flags; also the CONTEXTID size values. - Convert to symbols matching the actual register bits, instead of some random *other* bits (and then correcting that abuse). - Get rid of a now-needless enum. - Keep those values in etm->control, and remove etm->tracemode. These values all affect the trace data that's recorded by a trace pod or in the ETB. I modified the file format used to dump ETB data; since it's fairly clear nobody can use this mechanism now, this can't cause anyone trouble. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ETM: start cleaning up ETM_CTRL bit handlingDavid Brownell2009-12-193-36/+63
| | | | | | | | | | | | | | | | | | | | | Provide better comments for the ETM_CTRL bits; use the correct bit for half/full clock mode; and define a few more of the bits available from the earliest ETM versions. The new bit defintions use ETM_CTRL_* names to match their register (instead of ETM_PORT_* or ETMV1_*). For clarity, and better matching to docs, they are defined with bitshifting not pre-computed masks. Stop abusing typdefs for ETM_CTRL values; such values are not limited to the enumerated set of individual bit values. Rename etm->portmode to etm->control ... and start morphing it into a single generic shadow of ETM_CTRL. Eventually etm->tracemode should vanish, so we can just write etm->control to ETM_CTRL. Restore an "if" that somehow got dropped. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ETM trigger_percent becomes an ETB commandDavid Brownell2009-12-194-52/+58
| | | | | | | | This command was misplaced; it's not generic to all traceport drivers, only the ETB supports this kind of configuration. So move it, and update the relevant documentation. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* XScale: better {read,write}_phys()David Brownell2009-12-181-2/+14
| | | | | | | | We can actually do the right thing if the MMU is off; save the error message for the phys-but-MMU-enabled path, which is what isn't yet supported. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* dsp563xx: cygwin build fixesDavid Brownell2009-12-181-5/+5
| | | | Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* XScale: use all-ones for BYPASS, not five-onesDavid Brownell2009-12-151-1/+1
| | | | | | PXA3xx has more than five bits in IR. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* target: add basic dsp563xx supportmkdorg@users.sourceforge.net2009-12-156-1/+1290
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* ARM11: improved reset supportDavid Brownell2009-12-141-48/+55
| | | | | | | | | | | | | | Teach ARM11 how to use: - the new "reset-assert" event - vector catch to implement "reset halt" - use SRST more like other cores do - ... including leaving post-SRST delays up to config scripts This gives OMAP2420 the ability to reset, and doesn't seem to cause new iMX31 problems. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: disassemble STM correctlyDavid Brownell2009-12-141-2/+5
| | | | | | There is no "STMMIDA" instruction. There is however "STMDAMI". Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* target files shouldn't #include <target/...h>David Brownell2009-12-1325-39/+38
| | | | | | | | | | | Make these ".h" files adopt the same policy the ".c" files already follow: don't use <subsystem/...h> syntax for private interfaces. If we ever get reviewed/supported "public" interfaces they should come exclusively from some include/... directory; that'll be the time to switch to <...> syntax for any subsystem's own interfaces. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* target: further shrink Jim-awarenessDavid Brownell2009-12-134-7/+10
| | | | | | | | | | | | | Don't include <helper/jim.h> from target.h ... not everything which touches targets needs to be able to talk to Jim. Plus, most files include this header by another path. Also, switch the affected files to use the classic sequence for #included files: all <framework/headers.h> first, then the "local_headers.h". This helps prevent growth of problematic layering, by minimizing entanglement. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM11: avoid pointless status returnsDavid Brownell2009-12-112-16/+11
| | | | | | | | For some routines that only returned ERROR_OK and where the caller never checked ... don't bother. Remove some noise, and bugfix some comments. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM DPM: support updating HW breakpointsDavid Brownell2009-12-112-52/+75
| | | | | | | | | | | Abstract the DPM breakpoint and watchpoint data structures to have a shared core for housekeeping. Abstract the code updating the watchpoint registers so that it can be used to update breakpoint registers. Then do so, when something has set up the breakpoint state used by this code. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: disassembly fixes for LDC/STC/MRRC/MCRRDavid Brownell2009-12-111-18/+33
| | | | | | | Properly detect all of these, including the "2" variants; and bugfix parameter display for LDC and STC. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM11: minor cleanup, mostly ITR commentsDavid Brownell2009-12-112-28/+43
| | | | | | | | | | | | | ITR register handling seemed to be giving me problems, so I updated the comments to better say what the code is trying to do ... and to note the preconditions (one of which seems to be an issue) as listed in the ARM1136 TRM. Also removed the unused "ARM11_TAP_DEFAULT" from the ITR scan code; all the callers already specify an exit path, since this register isn't usable with such vague semantics. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* optimisation: tiny optimisation for embedded iceØyvind Harboe2009-12-111-6/+5
| | | | | | | use two shift operations instead of three to set embedded ice register. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* embedded hosts: optimize common code path for core arm operationsØyvind Harboe2009-12-112-46/+66
| | | | | | | avoid fn call for the if check on whether anything needs to be done. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* ARM: update arm_opcodes.h copyrightDavid Brownell2009-12-091-0/+3
| | | | | | | I neglected to copy Magnus' copyright when I moved several declarations from the ARMv7-M header. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* Comment and doxygen fixesDavid Brownell2009-12-092-4/+14
| | | | Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ETM: only include oocd_trace.h when tracing enabled.Spencer Oliver2009-12-091-0/+3
| | | | | | Fixes build issue on systems that do not have <termios.h>, eg native win32. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
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