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* Improve trace command argument parsing.Zachary T Welch2009-11-051-2/+4
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* Improve arm_adi_v5 command argument parsing.Zachary T Welch2009-11-051-15/+42
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* Improve cortex_m3 command argument parsing.Zachary T Welch2009-11-051-6/+2
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* Improve xscale command argument parsing.Zachary T Welch2009-11-051-2/+2
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* Improve arm11 command argument parsing.Zachary T Welch2009-11-051-7/+7
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* Improve arm966e command argument parsing.Zachary T Welch2009-11-051-2/+4
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* Improve arm926ejs command argument parsing.Zachary T Welch2009-11-051-5/+6
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* Improve arm920t command argument parsing.Zachary T Welch2009-11-051-6/+12
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* Improve arm720t command argument parsing.Zachary T Welch2009-11-051-2/+5
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* Improve arm7_9_common command argument parsing.Zachary T Welch2009-11-051-8/+8
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* Improve armv7m command argument parsing.Zachary T Welch2009-11-051-11/+20
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* Improve armv7a command argument parsing.Zachary T Welch2009-11-051-5/+12
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* Improve armv4_5 command argument parsing.Zachary T Welch2009-11-051-2/+2
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* Improve xscale command argument parsing.Zachary T Welch2009-11-051-12/+12
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* Improve pld command argument parsing.Zachary T Welch2009-11-052-6/+11
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* Update all server port command to use new helper.Zachary T Welch2009-11-053-23/+5
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* Add server port command helper function.Zachary T Welch2009-11-052-0/+23
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* Improve target.c command argument parsing.Zachary T Welch2009-11-051-88/+36
| | | | | Passes cmd_ctx into parse_load_image_command_args for reporting the parsing errors therein.
* Improve jtag command argument parsing.Zachary T Welch2009-11-056-51/+36
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* Improve debug_level command argument parsing.Zachary T Welch2009-11-051-3/+1
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* Add macro for parsing numeric command arguments.Zachary T Welch2009-11-051-0/+21
| | | | | | | | This helper eliminates significant amount of redundant code in command handler functions throughout the system. It wraps the lower-level parse_* macros to implement a policy for reporting parse errors to the active command context (cmd_ctx). If errors do occur, this macro causes the calling function to abort with the proper return code.
* Add stringify macros in src/helper/types.h.Zachary T Welch2009-11-051-0/+4
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* arm920t: add mrcmcr interface fn's.Øyvind Harboe2009-11-051-0/+29
| | | | | | | | The arm920t has a concept of read modify write cycles that may have to be represented in the mrcmcr interface eventually. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* arm11: check if target is halted before executing mrc/mcr commands.Øyvind Harboe2009-11-051-0/+7
| | | | Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* target: fix ordering of arguments to mcr and mrc commandsØyvind Harboe2009-11-051-7/+7
| | | | | | Now matches machine code syntax and old arm11 syntax. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* target: check args to mrc/mcr.Øyvind Harboe2009-11-051-0/+24
| | | | Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* ARM11: added mrc/mcr support to arm11 code.Øyvind Harboe2009-11-051-0/+53
| | | | Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* target: Only register mrc mcr commands when one of the targets support them.Øyvind Harboe2009-11-051-3/+11
| | | | | | This avoids polluting help for targets that can never support mrc/mcr Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* cortex_a8: add mrc mcr interface.Øyvind Harboe2009-11-051-0/+29
| | | | Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* watchpoint_add() cleanupDavid Brownell2009-11-054-32/+40
| | | | | | | | | | | | Fail watchpoint_add() if it's the same address but the parameters are different ... don't just assume having the same address means the same watchpoint! (Note that overlapping watchpoints aren't detected...) Handle unrecognized return codes more sanely; don't exit()! And describe command params right. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* Cortex-M3: expose most DWT registersDavid Brownell2009-11-052-21/+144
| | | | | | | | | | | | | | | | | | | | | | | Expose most DWT registers via Tcl; there are a few more, but those are mostly for profiling along with the ITM. Having this set available enables operations which aren't possible with just the standard watchpoint operations. The cycle counter may be interesting. Turn it on after reset by setting the LSB of the dwt_ctrl register, and it counts CPU clocks. You can program the comparator 0 watchpoint to trigger on a given cycle count, rather than a data address. Likewise, comparator 1 may be able to match data values given address matches from one or two other comparators. (Not all hardware supports this capability though; try it. That is something the standard watchpoint methods should eventually handle, for the single address case.) Minor cleanup: remove needless functional indirection for exposing the v7m architctural registers. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* Cortex-M3: minor cleanupDavid Brownell2009-11-052-16/+4
| | | | | | | | | | | There's no reason to read which interrupts are enabled from the NVIC; that state isn't used. Plus, it's highly dynamic since firmware can change it at any time; remove the support for those state records. Remove duplicate definition of DWT_CTRL address; shrink a line. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* Cortex-M3: DWT cleanup/fixesDavid Brownell2009-11-051-56/+115
| | | | | | | | | | | | | Fix the watchpoint error checks, and do them in add(), not later in set() when it's mostly too late. Support the full range of watchpoint sizes (1 to 32K bytes each), and check alignments. Minor cleanup of DWT access: shrink lines, use "+" for address calculations, comment a few issues. Add debug message reporting DWT capabilities, matching the message for FBP, and some minor code and spec review comments. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARMv7M: add docs, remove exportsDavid Brownell2009-11-052-29/+63
| | | | | | | | | | | | Add Doxygen for the exported ARMv7-M interfaces. Make the non-exported stuff static. Remove functions and data which are now observably unused. Add comment about a small speedup that the run_algorithm() logic could use. Shrink a few too-long lines. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* target: add target->type->has_mmu fn.Øyvind Harboe2009-11-053-5/+48
| | | | | | | | | improve default target->read/write_phys_memory, produce more sensible error messages if the mmu interface functions have not been implemented yet vs. will not be implemented(e.g. cortex m3). Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* Make default implementation of mdw/mmw phys return error 'not implemented'Øyvind Harboe2009-11-051-2/+14
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* target: remove unused interface fn that clutters codeØyvind Harboe2009-11-0516-92/+0
| | | | | | | | | The quit entry point was not being invoked. Just a source of confusion at this point. XScale ran 100x reset upon quit, but that code made no sense, wasn't commented and never invoke. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* debug interface: get rid of unused pre_debug fnØyvind Harboe2009-11-059-16/+0
| | | | | | Removing unused code makes it much less mysterius. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* warnings: removeØyvind Harboe2009-11-051-3/+2
| | | | Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* ft2232: cleanupDavid Brownell2009-11-041-110/+97
| | | | | | | | | Previous patch somehow made GCC lose some of its cookies; work around, zero-init that struct. Clean up code from the previous patch. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* JTAG: support KT-LINK adapterKrzysztof Kajstura2009-11-041-0/+131
| | | | Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* target: 20 second timeout/megabyte for CRC checkØyvind Harboe2009-11-031-1/+4
| | | | | | | There was a fixed 20 second timeout which is too little for large, slow timeout checks. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* arm920t: memory writes were broken when MMU was disabledØyvind Harboe2009-11-031-11/+10
| | | | | | | | | | | To support breakpoints, flush data cache line and invalidate instruction cache when 4 and 2 byte words are written. The previous code was trying to write directly to the physical memory, which was buggy and had a number of other situations that were not handled. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* target: require working area for physical/virtual addresses to be specifiedØyvind Harboe2009-11-032-9/+29
| | | | | | | | | | | | | | | | Fixed bug: if virtual address for working memory was not specified and MMU was enabled, then address 0 would be used. Require working address to be specified for both MMU enabled and disabled case. For some completely inexplicable reason this fixes the regression in svn 2646 for flash write in arm926ejs target. The logs showed that MMU was disabled in the case below: https://lists.berlios.de/pipermail/openocd-development/2009-November/011882.html Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* FT2232: increase read retry countsDimitar Dimitrov2009-11-011-8/+26
| | | | | | | | This change is necessary to debug AT91SAM9260 on my PC with a FT2232H dongle. Signed-off-by: Dimitar Dimitrov <dinuxbg@gmail.com> Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* arm9tdmi: more correct fix for vector_catchDavid Brownell2009-10-311-8/+5
| | | | | | | Just use the array of names we're given, ignoring indices. The "reserved means don't use" patch missed that change. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM926: fix arm926ejs_mmu() reading from bad pointerDavid Brownell2009-10-301-1/+3
| | | | | | | | | I'm suspecting this code can never have worked, since the original commit (svn #335) in early 2008. Fix is just copy/paste from another (working) function. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* bin2char: for win32 set stdin/stdout to binary modeSpencer Oliver2009-10-301-0/+10
| | | | Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* SVF: fix checking bit pattern against lengthMichael Roth2009-10-291-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | The code works like follow (N = bit_len): N -1 %4 2<< -1 ~ (binary) -------------------------------------------------- 1 0 0 2 1 1111 1110 2 1 1 4 3 1111 1100 3 2 2 8 7 1111 1000 4 3 3 16 15 1111 0000 5 4 0 2 1 1111 1110 6 5 1 4 3 1111 1100 7 6 2 8 7 1111 1000 8 7 3 16 15 1111 0000 ... ... ... ... ... ... Addresses a bug reported by FangfangLi <ffli@syntest.com.cn>. [dbrownell@users.sourceforge.net: fix spelling bug too] Signed-off-by: Michael Roth <mroth@nessie.de> Cc: FangfangLi <ffli@syntest.com.cn> Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* XSVF: bugfix handling state pathsDavid Brownell2009-10-291-15/+100
| | | | | | | | | | | | | | | | | | | | | | | Implement XSVF support for detailed state path transitions, by collecting sequences of XSTATE transitions into paths and then calling pathmove(). It seems that the Xilinx tools want to force state-by-state transitions instead of relying on the standardized SVF paths. Like maybe there are XSVF tools not implementing SVF paths, which are all that we support using svf_statemove(). So from IRPAUSE, instead of just issuing "XSTATE DRPAUSE" they will issue XSTATES for each intermediate state: first IREXIT2, then IRUPDATE, DRSELECT, DRCAPTURE, DREXIT1, and finally DRPAUSE. This works now. Handling of paths that go *through* reset is a trifle dodgey, but it should be safe. Tested-by: Wookey <wookey@wookware.org> Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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