| Commit message (Collapse) | Author | Age | Files | Lines |
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I a mail conversation with Øyvind we stated that speed may not be set at
all on case CLOCK_MODE_KHZ and CLOCK_MODE_RCLK. Also there isn't proper
error propagation adapter_khz_to_speed or jtag_rclk_to_speed.
So jtag_get_speed may need some rewrite for error propagation.
CC: Øyvind Harboe <oyvind.harboe@zylin.com>
Signed-off-by: Alexander Stein <alexander.stein@informatik.tu-chemnitz.de>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
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Some versions of GCC don't pick up that local variables
are set in all code paths.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
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powered down
Do not fail startup if communication with target is
not possible.
OpenOCD supports launching without a target connected
or the target powered down.
The user will typically power up the target and issue
a "reset init" + load his application after OpenOCD
is started then.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
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Someone called David Carne popped up on IRC and offered a fix (as he's not
on this list so can;t post here). I am just passing it on. (thanx David)
10:54 < davidc__> Basically; the Numonyx M29W160ET has an incorrect CFI PRI
block; it describes the erase blocks backwards
10:54 < davidc__> the linked patch has a fixup for that part [really trivial]:
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This new cmd adds the ability to choose the Cortex-M3
reset method used.
It defaults to using SRST for reset if available otherwise
it falls back to using NVIC VECTRESET. This is known to work
on all cores.
Move any luminary specific reset handling to the stellaris cfg file.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
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This speeds up programming for targets with more working area,
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
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bitq.c: In function ‘bitq_scan_field’:
bitq.c:224: error: declaration of ‘pause’ shadows a global declaration
/usr/include/unistd.h:429: error: shadowed declaration is here
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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committed so as to ease cooperation and to let it be improved
over time.
So far it supports:
- halt/resume
- registers inspection
- memory inspection/modification
I'm still getting up to speed with OpenOCD internals and AVR32 so code is a little
bit messy and I'd appreciate any feedback.
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if a tap could not be _enabled_, the error message was
'failed to disable tap'. Fixed that. Also, display the failing
tap's name.
Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com>
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The patch improves flash erase for STR9x in case of a full bank erase.
Then the chip erase command is used instead which improves speed significantly.
Also I think it might help if e.g. STR912 enters some state where flash banks are locked, and a chip erase command is the key for unlocking the flash.
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ocd_ prefix is used internally in OpenOCD as a kludge more
or less to deal with the two kinds of commands that OpenOCD
has.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
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error was returned instead of using assert.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
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when an unknown core mode is read from the target,
report error. Can be communication failure.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
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if polling is off, then "reset run + halt" would fail
since halt incorrectly assumed the target was in the
reset state as it is the internal poll implementation
that moves the sw tracking of the target state out
of the reset state.
To reproduce:
> reset run; halt
JTAG tap: zy1000.cpu tap/device found: 0x1f0f0f0f (mfg: 0x787, part: 0xf0f0, ver: 0x1)
BUG: arm7/9 does not support halt during reset. This is handled in arm7_9_assert_reset()
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
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back-off algorithm for polling. Double polling
interval up to 5000ms when it fails.
when polling succeeds, reset backoff.
This avoids flooding logs(as much) when working
with conditions where the target polling will fail.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
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It is useful to know that the printed errors are *all* the
errors there were.
Added missing error handling(found by inspection).
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
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revc uses 60MHz and revb 64MHz, use this in calculations.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
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Calculate printout based on same core routines.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
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prefix w/ioutil_
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
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It can be useful to get an approximate measurement of
rtck frequency for debugging purposes.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
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it can be useful to throttle performance: test
differences in behavior, test performance effect
of long roundtrips.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
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This can be used to calculate approximate RTCK frequency
for instance.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
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This flash driver works on more than just two chips.
(Though it does need work still, e.g. to protect more than 64K.
(On non-'3748-A0 chips where errata allow that.))
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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Make it scriptable, so code can be conditionalized based on
what transport is in use for the session.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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For the above targets the exit_point is
optional when used with run_algorithm, so remove it.
This makes updating the algorithm less error prone.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
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As the mips32 uses instruction breakpoints for algorithms we do not really
need to check the pc on exit.
This now matches the behaviour of the arm codebase.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
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As the armv7m uses instruction breakpoints for algorithms we do not really
need to check the pc on exit.
This now matches the behaviour of the arm4_5 codebase.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
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Update the arm_checksum_memory and arm_blank_check_memory
algorithms to use a breakpoint instruction on v5 arch.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
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Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
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Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
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found by inspection
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
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Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
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Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
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Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
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Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
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Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
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Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
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Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
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Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
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Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
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Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
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Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
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Set up more of the Luminary-specific signals, and stop cloning
a few of the JTAG defaults. More comments too.
Still leaves the "dap info 0" bugs unresolved (presumably coupled
to this particular adapter family) where TPIU, ITM, DWT, and other
debug modules wrongly display as extra NVICs.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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This adds a nand driver support for the nuc910 target.
Note that ECC is not currently supported by this driver, although
it is supported by the peripheral.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
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The nand probe now outputs the manufacturer if found.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
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found by code inspection
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
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